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109 lines
3.3 KiB
C
109 lines
3.3 KiB
C
#include <amd64/hpet.h>
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#include <libk/std.h>
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#include <limine/requests.h>
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#include <sync/spin_lock.h>
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#include <sys/debug.h>
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#include <sys/mm.h>
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#include <sys/spin.h>
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#include <uacpi/acpi.h>
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#include <uacpi/status.h>
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#include <uacpi/tables.h>
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#include <uacpi/uacpi.h>
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/**
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* @file
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*
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* @brief HPET (High Precision Event Timer) driver code.
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* See more at https://wiki.osdev.org/HPET
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*/
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/// HPET Main Counter Value Register
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#define HPET_MCVR 0xF0
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/// HPET General Configuration Register
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#define HPET_GCR 0x10
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/// HPET General Capabilities and ID Register
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#define HPET_GCIDR 0x00
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/// Set whether we sould use 32-bit or 64-bit reads/writes
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static bool hpet_32bits = 1;
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/// Physical address for HPET MMIO
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static uintptr_t hpet_paddr;
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/// HPET period in femtoseconds
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static uint64_t hpet_period_fs;
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/// Lock, which protects concurrent access. See \ref amd64/smp.c
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static spin_lock_t hpet_lock = SPIN_LOCK_INIT;
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/// Read a HPET register. Assumes caller holds \ref hpet_lock
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static uint64_t amd64_hpet_read (uint32_t reg) {
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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uintptr_t hpet_vaddr = hpet_paddr + (uintptr_t)hhdm->offset;
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return (hpet_32bits ? *(volatile uint32_t*)(hpet_vaddr + reg)
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: *(volatile uint64_t*)(hpet_vaddr + reg));
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}
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/// Write a HPET register. Assumes caller holds \ref hpet_lock
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static void amd64_hpet_write (uint32_t reg, uint64_t value) {
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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uintptr_t hpet_vaddr = hpet_paddr + (uintptr_t)hhdm->offset;
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if (hpet_32bits)
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*(volatile uint32_t*)(hpet_vaddr + reg) = (value & 0xFFFFFFFF);
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else
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*(volatile uint64_t*)(hpet_vaddr + reg) = value;
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}
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/// Read current value of \ref HPET_MCVR register.
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static uint64_t amd64_hpet_timestamp (void) { return amd64_hpet_read (HPET_MCVR); }
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/// Sleep for a given amount of microseconds. This time can last longer due to \ref hpet_lock being held.
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void amd64_hpet_sleep_micro (uint64_t us) {
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spin_lock (&hpet_lock);
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uint64_t start = amd64_hpet_timestamp ();
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uint64_t target_fs = us * 1000000000ULL;
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for (;;) {
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uint64_t current = amd64_hpet_timestamp ();
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uint64_t dt = current - start;
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if ((dt * hpet_period_fs) >= target_fs)
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break;
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__asm__ volatile ("pause" ::: "memory");
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}
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spin_unlock (&hpet_lock);
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}
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/// Initialize HPET
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void amd64_hpet_init (void) {
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struct uacpi_table hpet_table;
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uacpi_status status = uacpi_table_find_by_signature (ACPI_HPET_SIGNATURE, &hpet_table);
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if (status != UACPI_STATUS_OK) {
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DEBUG ("Could not find HPET table!\n");
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spin ();
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}
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struct acpi_hpet* hpet = (struct acpi_hpet*)hpet_table.virt_addr;
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hpet_paddr = (uintptr_t)hpet->address.address;
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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mm_map_kernel_page (hpet_paddr, (uintptr_t)hhdm->offset + hpet_paddr,
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MM_PG_PRESENT | MM_PG_RW | MM_PD_RELOAD);
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hpet_32bits = (amd64_hpet_read (HPET_GCIDR) & (1 << 13)) ? 0 : 1;
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/* reset */
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amd64_hpet_write (HPET_GCR, 0);
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amd64_hpet_write (HPET_MCVR, 0);
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amd64_hpet_write (HPET_GCR, 1);
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uint64_t gcidr = amd64_hpet_read (HPET_GCIDR);
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if (hpet_32bits) {
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uint32_t low = (uint32_t)gcidr;
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uint32_t high = (uint32_t)amd64_hpet_read (HPET_GCIDR + 4);
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gcidr = (((uint64_t)high << 32) | low);
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}
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hpet_period_fs = (gcidr >> 32);
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}
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