129 lines
3.8 KiB
C
129 lines
3.8 KiB
C
#include <amd64/io.h>
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#include <device/device.h>
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#include <device/idedrv.h>
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#include <device/pci.h>
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#include <device/pci_info.h>
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#include <devices.h>
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#include <libk/fieldsizeof.h>
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#include <libk/lengthof.h>
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#include <libk/printf.h>
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#include <libk/std.h>
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#include <sys/debug.h>
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static atomic_int ide_counter = 0;
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static const char* progif_msg[] = {
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[0x00] = "ISA Compatibility mode-only controller",
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[0x05] = "PCI native mode-only controller",
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[0x0A] =
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"ISA Compatibility mode controller, supports both channels switched to PCI native mode",
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[0x0F] =
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"PCI native mode controller, supports both channels switched to ISA compatibility mode",
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[0x80] = "ISA Compatibility mode-only controller, supports bus mastering",
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[0x85] = "PCI native mode-only controller, supports bus mastering",
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[0x8A] =
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"ISA Compatibility mode controller, supports both channels switched to PCI native mode, supports bus mastering",
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[0x8F] =
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"PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering",
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};
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static void ide_make_device (struct ide_probe probe) {
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DEBUG ("Found IDE drive: io=%x ctrl=%x no=%u sector=%zu count=%zu\n", probe.io, probe.ctrl,
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probe.devno, probe.sector_size, probe.sector_count);
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char device_key[fieldsizeof (struct device, key)];
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snprintf (device_key, sizeof (device_key), "IDE%d", atomic_fetch_add (&ide_counter, 1));
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device_op_func_t ops[] = {
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[XDRV_GET_SIZE] = &idedrv_get_size,
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[XDRV_GET_SECTOR_SIZE] = &idedrv_get_sector_size,
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[XDRV_GET_DEVICE_TYPE] = &idedrv_get_device_type,
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[XDRV_READ] = &idedrv_read,
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[XDRV_WRITE] = &idedrv_write,
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};
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struct idedrv_init init = {
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.lba48 = ((probe.flags & IDE_PROBE_LBA48) != 0),
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.sector_count = probe.sector_count,
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.sector_size = probe.sector_size,
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.io = probe.io,
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.ctrl = probe.ctrl,
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.devno = probe.devno,
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};
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device_create (device_key, ops, lengthof (ops), &idedrv_init, &idedrv_fini, &init);
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}
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bool pci_ide_init (struct pci_info pci_info) {
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uint16_t pci_cmd = pci_read16 (pci_info.bus, pci_info.slot, pci_info.func, PCI_COMMAND);
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uint16_t new_cmd = pci_cmd | (1 << 0);
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if (pci_cmd != new_cmd) {
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pci_write16 (pci_info.bus, pci_info.slot, pci_info.func, PCI_COMMAND, new_cmd);
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}
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struct ide_probe probe;
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uint8_t progif = pci_read8 (pci_info.bus, pci_info.slot, pci_info.func, PCI_PROG_IF);
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DEBUG ("progif: %s\n", progif_msg[progif]);
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uint16_t pcmd, pctrl, scmd, sctrl;
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if ((progif & 0x01)) {
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uint32_t bar0 = pci_read32 (pci_info.bus, pci_info.slot, pci_info.func, PCI_BAR0);
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uint32_t bar1 = pci_read32 (pci_info.bus, pci_info.slot, pci_info.func, PCI_BAR1);
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if (!(bar0 & PCI_BAR_IO) || !(bar1 & PCI_BAR_IO)) {
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DEBUG ("Non IO BARs not supported\n");
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return false;
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}
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pcmd = (uint16_t)(bar0 & 0xFFFC);
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pctrl = (uint16_t)(bar1 & 0xFFFC);
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if (pctrl)
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pctrl += 2;
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} else {
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pcmd = 0x1F0;
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pctrl = 0x3F6;
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}
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if ((progif & 0x04)) {
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uint32_t bar2 = pci_read32 (pci_info.bus, pci_info.slot, pci_info.func, PCI_BAR2);
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uint32_t bar3 = pci_read32 (pci_info.bus, pci_info.slot, pci_info.func, PCI_BAR3);
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if (!(bar2 & PCI_BAR_IO) || !(bar3 & PCI_BAR_IO)) {
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DEBUG ("Non IO BARs not supported\n");
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return false;
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}
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scmd = (uint16_t)(bar2 & 0xFFFC);
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sctrl = (uint16_t)(bar3 & 0xFFFC);
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if (sctrl)
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sctrl += 2;
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} else {
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scmd = 0x170;
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sctrl = 0x376;
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}
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uint16_t channels[2][2] = {{pcmd, pctrl}, {scmd, sctrl}};
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for (size_t i = 0; i < lengthof (channels); i++) {
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uint16_t cmd = channels[i][0];
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uint16_t ctrl = channels[i][1];
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if (cmd == 0)
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continue;
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for (size_t dev = 0; dev < 2; dev++) {
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ide_probe (cmd, ctrl, dev, &probe);
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if ((probe.flags & IDE_PROBE_AVAIL))
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ide_make_device (probe);
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}
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}
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return true;
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}
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