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sys/smp: Add xAPIC ICR delivery status checks to INIT-SIPI-SIPI sequence

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This commit is contained in:
Mintsuki
2026-02-23 15:39:59 +01:00
parent 6e8a10e9d0
commit b627a65d58
3 changed files with 19 additions and 1 deletions
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9
common/sys/lapic.c
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@@ -242,6 +242,15 @@ void lapic_write(uint32_t reg, uint32_t data) {
mmoutd(lapic_mmio_base + reg, data);
}
void lapic_icr_wait(void) {
for (int i = 0; i < 1000000; i++) {
if (!(lapic_read(LAPIC_REG_ICR0) & (1 << 12))) {
return;
}
asm volatile ("pause");
}
}
bool x2apic_check(void) {
uint32_t eax, ebx, ecx, edx;
if (!cpuid(1, 0, &eax, &ebx, &ecx, &edx))

1
common/sys/lapic.h
View File

@@ -17,6 +17,7 @@ bool lapic_check(void);
void lapic_eoi(void);
uint32_t lapic_read(uint32_t reg);
void lapic_write(uint32_t reg, uint32_t data);
void lapic_icr_wait(void);
bool x2apic_check(void);
bool x2apic_enable(void);

10
common/sys/smp.c
View File

@@ -84,6 +84,7 @@ static bool smp_start_ap(uint32_t lapic_id, struct gdtr *gdtr,
if (x2apic) {
x2apic_write(LAPIC_REG_ICR0, ((uint64_t)lapic_id << 32) | 0x4500);
} else {
lapic_icr_wait();
lapic_write(LAPIC_REG_ICR1, lapic_id << 24);
lapic_write(LAPIC_REG_ICR0, 0x4500);
}
@@ -95,10 +96,17 @@ static bool smp_start_ap(uint32_t lapic_id, struct gdtr *gdtr,
x2apic_write(LAPIC_REG_ICR0, ((uint64_t)lapic_id << 32) |
((size_t)trampoline / 4096) | 0x4600);
} else {
lapic_icr_wait();
lapic_write(LAPIC_REG_ICR1, lapic_id << 24);
lapic_write(LAPIC_REG_ICR0, ((size_t)trampoline / 4096) | 0x4600);
}
stall(200);
if (j == 0) {
stall(200);
}
}
if (!x2apic) {
lapic_icr_wait();
}
for (int i = 0; i < 100; i++) {