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ecfe1a7eae
| Author | SHA1 | Date | |
|---|---|---|---|
| ecfe1a7eae | |||
| 88f9d0e3d4 | |||
| 28c95303e9 | |||
| 638214a0e2 | |||
| 4fb5448dd9 |
@ -117,7 +117,7 @@ static uint8_t ctlmap[256] =
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[0xc7] KB_HOME,
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[0xc7] KB_HOME,
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};
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};
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int32_t ps2kb_intr(void) {
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int32_t ps2kbdev_keycode(void) {
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static uint8_t shift;
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static uint8_t shift;
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static uint8_t *charcode[4] = { normalmap, shiftmap, ctlmap, ctlmap };
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static uint8_t *charcode[4] = { normalmap, shiftmap, ctlmap, ctlmap };
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uint32_t st, data, c;
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uint32_t st, data, c;
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@ -156,23 +156,21 @@ int32_t ps2kb_intr(void) {
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IpcMBus *PS2KB_MBUS;
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IpcMBus *PS2KB_MBUS;
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int ps2kbdev_intr(IntrStackFrame *frame) {
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void ps2kbdev_intr(IntrStackFrame *frame) {
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(void)frame;
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(void)frame;
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int32_t c = ps2kb_intr();
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int32_t c = ps2kbdev_keycode();
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if (c >= 0) {
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if (c >= 0) {
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uint8_t b = c;
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uint8_t b = c;
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ipc_mbuspublish("ps2kb", &b);
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ipc_mbuspublish("ps2kb", &b);
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}
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}
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return 0;
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}
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}
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void ps2kbdev_init(void) {
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void ps2kbdev_init(void) {
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intr_attchhandler(&ps2kbdev_intr, INTR_IRQBASE+1);
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Dev *ps2kbdev;
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Dev *ps2kbdev;
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HSHTB_ALLOC(DEVTABLE.devs, ident, "ps2kbdev", ps2kbdev);
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HSHTB_ALLOC(DEVTABLE.devs, ident, "ps2kbdev", ps2kbdev);
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spinlock_init(&ps2kbdev->spinlock);
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spinlock_init(&ps2kbdev->spinlock);
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PS2KB_MBUS = ipc_mbusmake("ps2kb", 1, 0x100);
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PS2KB_MBUS = ipc_mbusmake("ps2kb", 1, 0x100);
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intr_attchhandler(&ps2kbdev_intr, INTR_IRQBASE+1);
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}
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}
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@ -19,14 +19,14 @@
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typedef struct IntrHandler {
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typedef struct IntrHandler {
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struct IntrHandler *next;
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struct IntrHandler *next;
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int (*fn)(IntrStackFrame *frame);
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void (*fn)(IntrStackFrame *frame);
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int irq;
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int irq;
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} IntrHandler;
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} IntrHandler;
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IntrHandler *INTR_HANDLERS = NULL;
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IntrHandler *INTR_HANDLERS = NULL;
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SpinLock INTR_HANDLERS_SPINLOCK;
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SpinLock INTR_HANDLERS_SPINLOCK;
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void intr_attchhandler(int (*fn)(IntrStackFrame *frame), int irq) {
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void intr_attchhandler(void (*fn)(IntrStackFrame *frame), int irq) {
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IntrHandler *ih = dlmalloc(sizeof(*ih));
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IntrHandler *ih = dlmalloc(sizeof(*ih));
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ih->fn = fn;
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ih->fn = fn;
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ih->irq = irq;
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ih->irq = irq;
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@ -186,7 +186,6 @@ void intr_init(void) {
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idt_init();
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idt_init();
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intr_pic_init();
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intr_pic_init();
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intr_pit_init();
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intr_pit_init();
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intr_disable();
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}
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}
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void intr_dumpframe(IntrStackFrame *frame) {
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void intr_dumpframe(IntrStackFrame *frame) {
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@ -246,13 +245,19 @@ void intr_handleintr(IntrStackFrame *frame) {
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cpu_hang();
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cpu_hang();
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}
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}
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} else if (frame->trapnum >= 32 && frame->trapnum <= 47) {
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} else if (frame->trapnum >= 32 && frame->trapnum <= 47) {
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IntrHandler *ih, *ihtmp;
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if (frame->trapnum == INTR_IRQBASE+0) {
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LL_FOREACH_SAFE(INTR_HANDLERS, ih, ihtmp) {
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PIT_TICKS++;
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if ((uint64_t)ih->irq == frame->trapnum) {
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intr_pic_eoi(frame->trapnum >= 40);
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ih->fn(frame);
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proc_sched((void *)frame);
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} else {
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IntrHandler *ih, *ihtmp;
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LL_FOREACH_SAFE(INTR_HANDLERS, ih, ihtmp) {
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if ((uint64_t)ih->irq == frame->trapnum) {
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ih->fn(frame);
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}
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}
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}
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intr_pic_eoi(frame->trapnum >= 40);
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}
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}
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intr_pic_eoi();
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} else if (frame->trapnum == 0x80) {
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} else if (frame->trapnum == 0x80) {
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intr_syscalldispatch(frame);
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intr_syscalldispatch(frame);
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}
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}
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@ -35,7 +35,7 @@ typedef struct {
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uint64_t ss;
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uint64_t ss;
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} PACKED IntrStackFrame;
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} PACKED IntrStackFrame;
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void intr_attchhandler(int (*fn)(IntrStackFrame *frame), int irq);
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void intr_attchhandler(void (*fn)(IntrStackFrame *frame), int irq);
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int32_t intr_dttchhandler(int irq);
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int32_t intr_dttchhandler(int irq);
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void intr_disable(void);
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void intr_disable(void);
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void intr_enable(void);
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void intr_enable(void);
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@ -25,22 +25,44 @@
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void intr_pic_init(void) {
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void intr_pic_init(void) {
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io_out8(PIC1_CMD, ICW1_INIT | ICW1_ICW4);
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io_out8(PIC1_CMD, ICW1_INIT | ICW1_ICW4);
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io_wait();
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io_out8(PIC2_CMD, ICW1_INIT | ICW1_ICW4);
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io_out8(PIC2_CMD, ICW1_INIT | ICW1_ICW4);
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io_wait();
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io_out8(PIC1_DATA, INTR_IRQBASE);
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io_out8(PIC1_DATA, INTR_IRQBASE);
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io_wait();
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io_out8(PIC2_DATA, INTR_IRQBASE+8);
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io_out8(PIC2_DATA, INTR_IRQBASE+8);
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io_wait();
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io_out8(PIC1_DATA, 2);
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io_out8(PIC1_DATA, 2);
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io_wait();
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io_out8(PIC2_DATA, 2);
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io_out8(PIC2_DATA, 2);
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io_wait();
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io_out8(PIC1_DATA, ICW4_8086);
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io_out8(PIC1_DATA, ICW4_8086);
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io_wait();
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io_out8(PIC2_DATA, ICW4_8086);
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io_out8(PIC2_DATA, ICW4_8086);
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io_wait();
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io_out8(PIC1_DATA, 0);
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intr_pic_mask();
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io_out8(PIC2_DATA, 0);
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}
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}
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void intr_pic_eoi(void) {
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void intr_pic_mask(void) {
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io_out8(PIC2_CMD, PIC_EOI);
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io_out8(PIC1_DATA, 0xFF);
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io_wait();
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io_out8(PIC2_DATA, 0xFF);
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io_wait();
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}
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void intr_pic_unmask(void) {
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io_out8(PIC1_DATA, 0);
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io_wait();
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io_out8(PIC2_DATA, 0);
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io_wait();
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}
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void intr_pic_eoi(bool pic2) {
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if (pic2)
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io_out8(PIC2_CMD, PIC_EOI);
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io_out8(PIC1_CMD, PIC_EOI);
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io_out8(PIC1_CMD, PIC_EOI);
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}
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}
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@ -1,7 +1,11 @@
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#ifndef INTR_PIC_H_
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#ifndef INTR_PIC_H_
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#define INTR_PIC_H_
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#define INTR_PIC_H_
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#include <stdbool.h>
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void intr_pic_init(void);
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void intr_pic_init(void);
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void intr_pic_eoi(void);
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void intr_pic_eoi(bool pic2);
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void intr_pic_mask(void);
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void intr_pic_unmask(void);
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#endif // INTR_PIC_H_
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#endif // INTR_PIC_H_
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@ -31,14 +31,7 @@ void intr_pit_wait(uint32_t ms) {
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while (PIT_TICKS - now < ms);
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while (PIT_TICKS - now < ms);
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}
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}
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int intr_pit_intr(IntrStackFrame *frame) {
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PIT_TICKS++;
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return 0;
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}
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void intr_pit_init(void) {
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void intr_pit_init(void) {
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intr_attchhandler(&intr_pit_intr, INTR_IRQBASE+0);
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uint32_t hz = 1000;
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uint32_t hz = 1000;
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uint32_t div = PIT_FREQ / hz;
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uint32_t div = PIT_FREQ / hz;
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io_out8(PIT_CMD, PIT_CMD_BINARY | PIT_CMD_MODE3 | PIT_CMD_RW_BOTH | PIT_CMD_COUNTER0);
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io_out8(PIT_CMD, PIT_CMD_BINARY | PIT_CMD_MODE3 | PIT_CMD_RW_BOTH | PIT_CMD_COUNTER0);
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@ -45,3 +45,7 @@ void io_outs16(uint16_t port, const void *addr, int cnt) {
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: "memory", "cc"
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: "memory", "cc"
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);
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);
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}
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}
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void io_wait(void) {
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io_out8(0x80, 0);
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}
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@ -15,4 +15,6 @@ void io_out32(uint16_t port, uint32_t value);
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void io_ins16(uint16_t port, void *addr, int cnt);
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void io_ins16(uint16_t port, void *addr, int cnt);
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void io_outs16(uint16_t port, const void *addr, int cnt);
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void io_outs16(uint16_t port, const void *addr, int cnt);
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void io_wait(void);
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#endif // IO_IO_H_
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#endif // IO_IO_H_
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@ -49,11 +49,11 @@ void kmain(void) {
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pmm_init();
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pmm_init();
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vmm_init();
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vmm_init();
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intr_init();
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intr_init();
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pci_init();
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randcrypto_init();
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randcrypto_init();
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ipc_mbusinit();
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ipc_mbusinit();
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dev_init();
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dev_init();
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storedev_init();
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storedev_init();
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pci_init();
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diskpart_init();
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diskpart_init();
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baseimg_init();
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baseimg_init();
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vfs_init();
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vfs_init();
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44
kernel/pci/ide.c
Normal file
44
kernel/pci/ide.c
Normal file
@ -0,0 +1,44 @@
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#include <stdint.h>
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#include <stddef.h>
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#include "pci/pci.h"
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#include "pci/ide.h"
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#include "storedev/atasd.h"
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#include "storedev/storedev.h"
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#include "util/util.h"
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#include "kprintf.h"
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#define ATA_MASTER 0x00
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#define ATA_SLAVE 0x01
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#define ATA_PROBE(STRING, IOBASE, CTRLBASE, S_OR_M) \
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ps = ata_probesize_bytes((IOBASE), (CTRLBASE), (S_OR_M)); \
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if (ps > 0) { \
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AtaSdInitExtra extra = { \
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.devno = (S_OR_M), \
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.capacity = ps, \
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.iobase = (IOBASE), \
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.ctrlbase = (CTRLBASE), \
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}; \
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storedev_create(STOREDEV_ATASD, (STRING), (void *)&extra); \
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}
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void pci_ide_init(PciDevInfo *devinfo) {
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LOG("pci", "init ATA drive\n");
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uint16_t iobase, ctrlbase;
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uint64_t ps;
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if (!(devinfo->progintf & 0x1)) {
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iobase = 0x1F0;
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ctrlbase = 0x3F6;
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}
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ATA_PROBE("atasd0m", iobase, ctrlbase, ATA_MASTER)
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ATA_PROBE("atasd0s", iobase, ctrlbase, ATA_SLAVE)
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if (!(devinfo->progintf & 0x4)) {
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iobase = 0x170;
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ctrlbase = 0x376;
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}
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ATA_PROBE("atasd1m", iobase, ctrlbase, ATA_MASTER)
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ATA_PROBE("atasd1s", iobase, ctrlbase, ATA_SLAVE)
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}
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8
kernel/pci/ide.h
Normal file
8
kernel/pci/ide.h
Normal file
@ -0,0 +1,8 @@
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#ifndef PCI_IDE_H_
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#define PCI_IDE_H_
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#include "pci/pci.h"
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void pci_ide_init(PciDevInfo *devinfo);
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#endif // PCI_IDE_H_
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@ -5,6 +5,7 @@
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#include "io/io.h"
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#include "io/io.h"
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#include "std/string.h"
|
#include "std/string.h"
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#include "util/util.h"
|
#include "util/util.h"
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#include "pci/ide.h"
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#include "kprintf.h"
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#include "kprintf.h"
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|
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uint8_t pci_read8(uint32_t id, uint32_t reg) {
|
uint8_t pci_read8(uint32_t id, uint32_t reg) {
|
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@ -76,6 +77,7 @@ void pci_getbar(PciBar *bar, uint32_t id, uint32_t idx) {
|
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}
|
}
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|
|
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static PciMatch PCI_MATCHES[] = {
|
static PciMatch PCI_MATCHES[] = {
|
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|
{ 0x8086, 0x7010, &pci_ide_init },
|
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};
|
};
|
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|
|
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void pci_visit(uint32_t bus, uint32_t dev, uint32_t fn) {
|
void pci_visit(uint32_t bus, uint32_t dev, uint32_t fn) {
|
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@ -103,8 +105,7 @@ void pci_visit(uint32_t bus, uint32_t dev, uint32_t fn) {
|
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pci_classname(devinfo.classcode, devinfo.subclass, devinfo.progintf));
|
pci_classname(devinfo.classcode, devinfo.subclass, devinfo.progintf));
|
||||||
|
|
||||||
for (size_t i = 0; i < LEN(PCI_MATCHES); i++) {
|
for (size_t i = 0; i < LEN(PCI_MATCHES); i++) {
|
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if ((PCI_MATCHES[i].k1 == devinfo.vendorid && PCI_MATCHES[i].k2 == devinfo.deviceid)
|
if (PCI_MATCHES[i].k1 == devinfo.vendorid && PCI_MATCHES[i].k2 == devinfo.deviceid) {
|
||||||
|| (PCI_MATCHES[i].k1 == devinfo.classcode && PCI_MATCHES[i].k2 == devinfo.subclass)) {
|
|
||||||
PCI_MATCHES[i].initfn(&devinfo);
|
PCI_MATCHES[i].initfn(&devinfo);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@ -82,6 +82,7 @@ uint32_t pci_read32(uint32_t id, uint32_t reg);
|
|||||||
void pci_write8(uint32_t id, uint32_t reg, uint8_t v);
|
void pci_write8(uint32_t id, uint32_t reg, uint8_t v);
|
||||||
void pci_write16(uint32_t id, uint32_t reg, uint16_t v);
|
void pci_write16(uint32_t id, uint32_t reg, uint16_t v);
|
||||||
void pci_write32(uint32_t id, uint32_t reg, uint32_t v);
|
void pci_write32(uint32_t id, uint32_t reg, uint32_t v);
|
||||||
|
void pci_getbar(PciBar *bar, uint32_t id, uint32_t idx);
|
||||||
|
|
||||||
void pci_init(void);
|
void pci_init(void);
|
||||||
|
|
||||||
|
|||||||
@ -253,23 +253,17 @@ void proc_killself(void) {
|
|||||||
proc_kill(proc);
|
proc_kill(proc);
|
||||||
}
|
}
|
||||||
|
|
||||||
int proc_intr(IntrStackFrame *frame) {
|
|
||||||
intr_pic_eoi();
|
|
||||||
proc_sched(frame);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
void proc_init(void) {
|
void proc_init(void) {
|
||||||
spinlock_init(&PROCS.spinlock);
|
spinlock_init(&PROCS.spinlock);
|
||||||
PROCS.procs = NULL;
|
PROCS.procs = NULL;
|
||||||
|
|
||||||
intr_attchhandler(&proc_intr, INTR_IRQBASE+0);
|
|
||||||
|
|
||||||
Proc *init = proc_spawnuser("base", "/bin/init");
|
Proc *init = proc_spawnuser("base", "/bin/init");
|
||||||
PROCS.current = init;
|
PROCS.current = init;
|
||||||
proc_register(init);
|
proc_register(init);
|
||||||
init->state = PROC_READY;
|
init->state = PROC_READY;
|
||||||
|
|
||||||
|
intr_pic_unmask();
|
||||||
|
|
||||||
tss.rsp0 = (uint64_t)VIRT(PROCS.current->platformdata.kstack);
|
tss.rsp0 = (uint64_t)VIRT(PROCS.current->platformdata.kstack);
|
||||||
proc_switch(&PROCS.current->platformdata.trapframe, (void *)PROCS.current->platformdata.cr3);
|
proc_switch(&PROCS.current->platformdata.trapframe, (void *)PROCS.current->platformdata.cr3);
|
||||||
}
|
}
|
||||||
|
|||||||
@ -17,7 +17,7 @@ void spinlock_init(SpinLock *sl) {
|
|||||||
|
|
||||||
uint64_t irqsave(void) {
|
uint64_t irqsave(void) {
|
||||||
uint64_t flags;
|
uint64_t flags;
|
||||||
asm volatile("pushfq; cli; popq %0" : "=r"(flags) :: "memory", "cc");
|
asm volatile("pushfq; popq %0; cli" : "=r"(flags) :: "memory", "cc");
|
||||||
return flags;
|
return flags;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -43,7 +43,6 @@ void irqrestore_nested(void) {
|
|||||||
|
|
||||||
void spinlock_acquire(SpinLock *sl) {
|
void spinlock_acquire(SpinLock *sl) {
|
||||||
irqsave_nested();
|
irqsave_nested();
|
||||||
|
|
||||||
while (atomic_test_and_set_explicit(&sl->lock, memory_order_acquire)) {
|
while (atomic_test_and_set_explicit(&sl->lock, memory_order_acquire)) {
|
||||||
SPINLOCK_HINT();
|
SPINLOCK_HINT();
|
||||||
}
|
}
|
||||||
|
|||||||
@ -106,67 +106,6 @@ uint64_t ata_probesize_bytes(uint16_t iobase, uint16_t ctrlbase, int devno) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void ata_probe(void) {
|
|
||||||
uint64_t probesize;
|
|
||||||
|
|
||||||
probesize = ata_probesize_bytes(0x1F0, 0x3F6, ATA_MASTER);
|
|
||||||
if (probesize > 0) {
|
|
||||||
|
|
||||||
char hs[20];
|
|
||||||
LOG("ata", "found ATA primary bus master, size = %s\n", human_size(probesize, hs, sizeof(hs)));
|
|
||||||
|
|
||||||
AtaSdInitExtra extra = {
|
|
||||||
.devno = ATA_MASTER,
|
|
||||||
.capacity = probesize,
|
|
||||||
.iobase = 0x1F0,
|
|
||||||
.ctrlbase = 0x3F6,
|
|
||||||
};
|
|
||||||
storedev_create(STOREDEV_ATASD, "atasd0m", (void *)&extra);
|
|
||||||
}
|
|
||||||
|
|
||||||
probesize = ata_probesize_bytes(0x1F0, 0x3F6, ATA_SLAVE);
|
|
||||||
if (probesize > 0) {
|
|
||||||
char hs[20];
|
|
||||||
LOG("ata", "found ATA primary bus slave, size = %s\n", human_size(probesize, hs, sizeof(hs)));
|
|
||||||
|
|
||||||
AtaSdInitExtra extra = {
|
|
||||||
.devno = ATA_SLAVE,
|
|
||||||
.capacity = probesize,
|
|
||||||
.iobase = 0x1F0,
|
|
||||||
.ctrlbase = 0x3F6,
|
|
||||||
};
|
|
||||||
storedev_create(STOREDEV_ATASD, "atasd0s", (void *)&extra);
|
|
||||||
}
|
|
||||||
|
|
||||||
probesize = ata_probesize_bytes(0x170, 0x376, ATA_MASTER);
|
|
||||||
if (probesize > 0) {
|
|
||||||
char hs[20];
|
|
||||||
LOG("ata", "found ATA secondary bus master, size = %s\n", human_size(probesize, hs, sizeof(hs)));
|
|
||||||
|
|
||||||
AtaSdInitExtra extra = {
|
|
||||||
.devno = ATA_MASTER,
|
|
||||||
.capacity = probesize,
|
|
||||||
.iobase = 0x170,
|
|
||||||
.ctrlbase = 0x376,
|
|
||||||
};
|
|
||||||
storedev_create(STOREDEV_ATASD, "atasd1m", (void *)&extra);
|
|
||||||
}
|
|
||||||
|
|
||||||
probesize = ata_probesize_bytes(0x170, 0x376, ATA_SLAVE);
|
|
||||||
if (probesize > 0) {
|
|
||||||
char hs[20];
|
|
||||||
LOG("ata", "found ATA secondary bus slave, size = %s\n", human_size(probesize, hs, sizeof(hs)));
|
|
||||||
|
|
||||||
AtaSdInitExtra extra = {
|
|
||||||
.devno = ATA_SLAVE,
|
|
||||||
.capacity = probesize,
|
|
||||||
.iobase = 0x170,
|
|
||||||
.ctrlbase = 0x376,
|
|
||||||
};
|
|
||||||
storedev_create(STOREDEV_ATASD, "atasd1s", (void *)&extra);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void ata_setup(uint16_t iobase, uint16_t ctrlbase, int devno, uint16_t sectors, uint64_t lba) {
|
void ata_setup(uint16_t iobase, uint16_t ctrlbase, int devno, uint16_t sectors, uint64_t lba) {
|
||||||
io_out8(ctrlbase, 0x02);
|
io_out8(ctrlbase, 0x02);
|
||||||
|
|
||||||
|
|||||||
@ -28,7 +28,6 @@ int32_t atasd_read(struct StoreDev *sd, uint8_t *const buffer, ptrdiff_t sector,
|
|||||||
int32_t atasd_write(struct StoreDev *sd, const uint8_t *const buffer, ptrdiff_t sector, ptrdiff_t off, size_t size);
|
int32_t atasd_write(struct StoreDev *sd, const uint8_t *const buffer, ptrdiff_t sector, ptrdiff_t off, size_t size);
|
||||||
int32_t atasd_cleanup(struct StoreDev *sd);
|
int32_t atasd_cleanup(struct StoreDev *sd);
|
||||||
size_t atasd_capacity(struct StoreDev *sd);
|
size_t atasd_capacity(struct StoreDev *sd);
|
||||||
|
uint64_t ata_probesize_bytes(uint16_t iobase, uint16_t ctrlbase, int devno);
|
||||||
void ata_probe(void);
|
|
||||||
|
|
||||||
#endif // STOREDEV_ATASD_H_
|
#endif // STOREDEV_ATASD_H_
|
||||||
|
|||||||
@ -21,8 +21,6 @@ void storedev_init(void) {
|
|||||||
STOREDEV_LIST.head = NULL;
|
STOREDEV_LIST.head = NULL;
|
||||||
|
|
||||||
LOG("storedev", "init\n");
|
LOG("storedev", "init\n");
|
||||||
|
|
||||||
ata_probe();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int32_t storedev_dev_read(Dev *dev, uint8_t *buffer, size_t len, uint64_t pid) {
|
int32_t storedev_dev_read(Dev *dev, uint8_t *buffer, size_t len, uint64_t pid) {
|
||||||
|
|||||||
@ -3,7 +3,7 @@
|
|||||||
set -x
|
set -x
|
||||||
|
|
||||||
qemu-system-x86_64 \
|
qemu-system-x86_64 \
|
||||||
-cpu IvyBridge \
|
-machine pc \
|
||||||
-m 4G \
|
-m 4G \
|
||||||
-boot d \
|
-boot d \
|
||||||
-serial stdio \
|
-serial stdio \
|
||||||
|
|||||||
Reference in New Issue
Block a user