676 lines
17 KiB
C
676 lines
17 KiB
C
#include <amd64/apic.h>
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#include <amd64/intr_defs.h>
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#include <amd64/io.h>
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#include <aux/compiler.h>
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#include <device/device.h>
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#include <device/storage/idedrv.h>
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#include <device/storage/partitions.h>
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#include <devices.h>
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#include <irq/irq.h>
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#include <libk/align.h>
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#include <libk/list.h>
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#include <libk/std.h>
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#include <libk/string.h>
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#include <limine/requests.h>
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#include <mm/malloc.h>
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#include <mm/pmm.h>
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#include <page_size.h>
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#include <proc/proc.h>
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#include <proc/reschedule.h>
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#include <status.h>
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#include <sync/biglock.h>
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#include <sys/debug.h>
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#include <sys/intr.h>
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#define IDE_REG_DATA 0x00
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#define IDE_REG_ERROR 0x01
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#define IDE_REG_SECCOUNT 0x02
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#define IDE_REG_LBA0 0x03
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#define IDE_REG_LBA1 0x04
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#define IDE_REG_LBA2 0x05
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#define IDE_REG_DRIVE 0x06
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#define IDE_REG_STATUS 0x07
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#define IDE_REG_CMD 0x07
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#define IDE_BSY 0x80
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#define IDE_DRDY 0x40
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#define IDE_DF 0x20
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#define IDE_ERR 0x01
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#define IDE_DRQ 0x08
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#define IDE_CMD_READ28 0x20
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#define IDE_CMD_WRITE28 0x30
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#define IDE_CMD_READ48 0x24
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#define IDE_CMD_WRITE48 0x34
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#define IDE_CMD_FLUSH48 0xEA
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#define IDE_CMD_FLUSH28 0xE7
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#define IDE_CMD_IDENTIFY 0xEC
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#define IDE_CMD_READ_DMA28 0xC8
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#define IDE_CMD_WRITE_DMA28 0xCA
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#define IDE_CMD_READ_DMA48 0x25
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#define IDE_CMD_WRITE_DMA48 0x35
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#define IDE_DMA_REG_CMD 0x00
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#define IDE_DMA_REG_STATUS 0x02
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#define IDE_DMA_REG_PRDT 0x04
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#define IDE_DMA_STATUS_ACTIVE 0x01
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#define IDE_DMA_STATUS_ERROR 0x02
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#define IDE_DMA_STATUS_INTR 0x04
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#define IDE_READ 1
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#define IDE_WRITE 2
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static bool ide_wait(uint16_t io, uint32_t timeout, bool drq, bool errcheck) {
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uint32_t i = 0;
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uint8_t status;
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while (1) {
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status = inb(io + IDE_REG_STATUS);
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if (!(status & IDE_BSY))
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break;
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if (++i >= timeout)
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return false;
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}
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if (errcheck && (status & (IDE_ERR | IDE_DF)))
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return false;
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if (!drq)
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return true;
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i = 0;
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while (1) {
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status = inb(io + IDE_REG_STATUS);
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if (status & (IDE_ERR | IDE_DF))
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return false;
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if (status & IDE_DRQ)
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return true;
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if (++i >= timeout)
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return false;
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}
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}
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#pragma clang optimize off
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static void ide_delay(uint16_t ctrl) {
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inb(ctrl);
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inb(ctrl);
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inb(ctrl);
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inb(ctrl);
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}
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#pragma clang optimize on
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static void ide_irq(void* arg, void* regs, bool user, struct reschedule_ctx* rctx) {
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(void)user, (void)regs, (void)rctx;
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struct idedrv* idedrv = arg;
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struct idedrv_request* req = idedrv->current_req;
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if (req == NULL) {
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(void)inb(idedrv->io + IDE_REG_STATUS);
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return;
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}
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uint8_t status = inb(idedrv->io + IDE_REG_STATUS);
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if ((status & (IDE_ERR | IDE_DF))) {
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atomic_store(&req->done, 1);
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idedrv->current_req = NULL;
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return;
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}
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if ((status & IDE_DRQ) && (req->sector_done_count < req->sector_count)) {
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uint16_t* p = req->buffer + (req->sector_done_count * (idedrv->sector_size / 2));
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if (req->type == IDE_READ)
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insw(idedrv->io + IDE_REG_DATA, p, idedrv->sector_size / 2);
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else
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outsw(idedrv->io + IDE_REG_DATA, p, idedrv->sector_size / 2);
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req->sector_done_count++;
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}
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if ((req->sector_done_count >= req->sector_count)) {
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atomic_store(&req->done, 1);
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idedrv->current_req = NULL;
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}
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}
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void ide_probe(uint16_t io, uint16_t ctrl, uint8_t devno, struct ide_probe* probe) {
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probe->flags = 0;
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probe->sector_count = 0;
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probe->sector_size = 0;
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uint16_t identify_buffer[256];
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uint8_t status = inb(io + IDE_REG_STATUS);
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if (status == 0xFF)
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return;
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outb(io + IDE_REG_DRIVE, 0xA0 | (devno << 4));
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ide_delay(ctrl);
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outb(io + IDE_REG_SECCOUNT, 0);
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outb(io + IDE_REG_LBA0, 0);
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outb(io + IDE_REG_LBA1, 0);
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outb(io + IDE_REG_LBA2, 0);
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outb(io + IDE_REG_CMD, IDE_CMD_IDENTIFY);
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status = inb(io + IDE_REG_STATUS);
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if (status == 0)
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return;
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if (!ide_wait(io, 90000000, true, true)) {
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return;
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}
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insw(io + IDE_REG_DATA, identify_buffer, 256);
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probe->flags |= IDE_PROBE_AVAIL;
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if ((identify_buffer[106] & 0xC000) == 0x4000 && identify_buffer[106] & (1 << 12)) {
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uint32_t words_per_sector =
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(uint32_t)identify_buffer[117] | ((uint32_t)identify_buffer[118] << 16);
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probe->sector_size = (size_t)words_per_sector * 2;
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}
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if ((identify_buffer[83] & (1 << 10)) != 0)
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probe->flags |= IDE_PROBE_LBA48;
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if ((probe->flags & IDE_PROBE_LBA48)) {
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probe->sector_count = (size_t)((uint64_t)identify_buffer[100] |
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((uint64_t)identify_buffer[101] << 16) |
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((uint64_t)identify_buffer[102] << 32) |
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((uint64_t)identify_buffer[103] << 48));
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} else {
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probe->sector_count =
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(size_t)((uint64_t)identify_buffer[60] | ((uint64_t)identify_buffer[61] << 16));
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}
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probe->io = io;
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probe->ctrl = ctrl;
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probe->devno = devno;
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if (probe->sector_size == 0)
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probe->sector_size = 512;
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}
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static void ide_prepare(struct idedrv* idedrv, size_t sector, uint16_t sector_count,
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bool irq_enable) {
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uint8_t ctrl = inb(idedrv->ctrl);
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if (irq_enable)
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ctrl &= ~0x02;
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else
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ctrl |= 0x02;
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outb(idedrv->ctrl, ctrl);
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if (idedrv->lba48) {
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outb(idedrv->io + IDE_REG_DRIVE, 0x40 | (idedrv->devno << 4));
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ide_delay(idedrv->ctrl);
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ide_wait(idedrv->io, 100000, false, false);
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outb(idedrv->io + IDE_REG_SECCOUNT, (sector_count >> 8) & 0xFF);
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outb(idedrv->io + IDE_REG_LBA0, (sector >> 24) & 0xFF);
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outb(idedrv->io + IDE_REG_LBA1, (sector >> 32) & 0xFF);
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outb(idedrv->io + IDE_REG_LBA2, (sector >> 40) & 0xFF);
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outb(idedrv->io + IDE_REG_SECCOUNT, sector_count & 0xFF);
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outb(idedrv->io + IDE_REG_LBA0, sector & 0xFF);
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outb(idedrv->io + IDE_REG_LBA1, (sector >> 8) & 0xFF);
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outb(idedrv->io + IDE_REG_LBA2, (sector >> 16) & 0xFF);
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} else {
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outb(idedrv->io + IDE_REG_DRIVE, 0xE0 | (idedrv->devno << 4) | ((sector >> 24) & 0x0F));
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ide_delay(idedrv->ctrl);
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ide_wait(idedrv->io, 100000, false, false);
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uint8_t count = (sector_count == 256) ? 0 : (uint8_t)sector_count;
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outb(idedrv->io + IDE_REG_SECCOUNT, count);
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outb(idedrv->io + IDE_REG_LBA0, sector & 0xFF);
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outb(idedrv->io + IDE_REG_LBA1, (sector >> 8) & 0xFF);
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outb(idedrv->io + IDE_REG_LBA2, (sector >> 16) & 0xFF);
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}
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}
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DEFINE_DEVICE_INIT(idedrv_init) {
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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struct idedrv_init* init = arg;
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struct idedrv* idedrv = malloc(sizeof(*idedrv));
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if (idedrv == NULL)
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return false;
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memset(idedrv, 0, sizeof(*idedrv));
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idedrv->device = device;
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idedrv->lba48 = init->lba48;
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idedrv->sector_count = init->sector_count;
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idedrv->sector_size = init->sector_size;
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idedrv->io = init->io;
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idedrv->ctrl = init->ctrl;
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idedrv->devno = init->devno;
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idedrv->irq = init->irq;
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idedrv->current_req = NULL;
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idedrv->irqs_support = init->irqs_support;
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idedrv->bmbase = init->bmbase;
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idedrv->bm_support = init->bm_support;
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if (idedrv->bm_support) {
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idedrv->prdt_phys = pmm_alloc(1);
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if (idedrv->prdt_phys >= 0xFFFFFFFF) {
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pmm_free(idedrv->prdt_phys, 1);
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free(idedrv);
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return false;
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}
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idedrv->prdt_entry_count = PAGE_SIZE / sizeof(struct ide_prd_entry);
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idedrv->prdt = (struct ide_prd_entry*)((uintptr_t)hhdm->offset + idedrv->prdt_phys);
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idedrv->bounce_buffer_phys = pmm_alloc_aligned(16, 16);
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if (idedrv->bounce_buffer_phys >= 0xFFFFFFFF) {
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pmm_free(idedrv->bounce_buffer_phys, 16);
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pmm_free(idedrv->prdt_phys, 1);
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free(idedrv);
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return false;
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}
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idedrv->bounce_buffer = (void*)((uintptr_t)hhdm->offset + idedrv->bounce_buffer_phys);
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}
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device->udata = idedrv;
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if (idedrv->irqs_support)
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irq_attach(&ide_irq, idedrv, idedrv->irq);
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return true;
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}
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DEFINE_DEVICE_FINI(idedrv_fini) {
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struct idedrv* idedrv = device->udata;
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if (idedrv->current_req != NULL) {
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free(idedrv->current_req);
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idedrv->current_req = NULL;
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}
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if (idedrv->irqs_support)
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irq_detach(idedrv->irq);
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if (idedrv->bm_support) {
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pmm_free(idedrv->bounce_buffer_phys, 16);
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pmm_free(idedrv->prdt_phys, 16);
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}
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free(idedrv);
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}
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static int idedrv_do_read_irqs(struct idedrv* idedrv, size_t sector, size_t sector_count,
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void* buffer) {
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struct idedrv_request* req = malloc(sizeof(*req));
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if (req == NULL)
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return -ST_OOM_ERROR;
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memset(req, 0, sizeof(*req));
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req->buffer = buffer;
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req->sector_count = sector_count;
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req->sector_done_count = 0;
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req->type = IDE_READ;
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idedrv->current_req = req;
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ide_prepare(idedrv, sector, sector_count, true);
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uint8_t cmd = idedrv->lba48 ? IDE_CMD_READ48 : IDE_CMD_READ28;
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outb(idedrv->io + IDE_REG_CMD, cmd);
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biglock_unlock();
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while (!atomic_load(&req->done))
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spin_lock_relax();
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biglock_lock();
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free(req);
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return ST_OK;
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}
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static int idedrv_do_read_no_irqs(struct idedrv* idedrv, size_t sector, size_t sector_count,
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void* buffer) {
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if (idedrv->bm_support) {
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size_t sectors_done = 0;
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while (sectors_done < sector_count) {
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size_t chunk_sectors = sector_count - sectors_done;
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size_t max_chunk = (16 * PAGE_SIZE) / idedrv->sector_size;
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if (chunk_sectors > max_chunk)
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chunk_sectors = max_chunk;
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size_t byte_count = chunk_sectors * idedrv->sector_size;
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idedrv->prdt[0].phys_addr = (uint32_t)idedrv->bounce_buffer_phys;
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idedrv->prdt[0].size = (uint16_t)byte_count;
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idedrv->prdt[0].rsvd_eot = 0x8000;
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outl(idedrv->bmbase + IDE_DMA_REG_PRDT, (uint32_t)idedrv->prdt_phys);
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outb(idedrv->bmbase + IDE_DMA_REG_CMD, 0x08);
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uint8_t status = inb(idedrv->bmbase + IDE_DMA_REG_STATUS);
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outb(idedrv->bmbase + IDE_DMA_REG_STATUS,
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status | IDE_DMA_STATUS_INTR | IDE_DMA_STATUS_ERROR);
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ide_prepare(idedrv, sector + sectors_done, chunk_sectors, false);
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uint8_t cmd = idedrv->lba48 ? IDE_CMD_READ_DMA48 : IDE_CMD_READ_DMA28;
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outb(idedrv->io + IDE_REG_CMD, cmd);
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outb(idedrv->bmbase + IDE_DMA_REG_CMD, 0x08 | 0x01);
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for (;;) {
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uint8_t bm_status = inb(idedrv->bmbase + IDE_DMA_REG_STATUS);
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if (!(bm_status & IDE_DMA_STATUS_ACTIVE))
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break;
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if ((bm_status & IDE_DMA_STATUS_ERROR)) {
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outb(idedrv->bmbase + IDE_DMA_REG_CMD, 0x00);
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return -ST_XDRV_READ_ERROR;
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}
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spin_lock_relax();
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}
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outb(idedrv->bmbase + IDE_DMA_REG_CMD, 0x00);
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inb(idedrv->io + IDE_REG_STATUS);
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memcpy((void*)((uint16_t*)buffer + (sectors_done * (idedrv->sector_size / 2))),
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idedrv->bounce_buffer, byte_count);
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sectors_done += chunk_sectors;
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}
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} else {
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ide_prepare(idedrv, sector, sector_count, false);
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uint8_t cmd = idedrv->lba48 ? IDE_CMD_READ48 : IDE_CMD_READ28;
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outb(idedrv->io + IDE_REG_CMD, cmd);
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for (uint16_t s = 0; s < sector_count; s++) {
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if (!ide_wait(idedrv->io, 100000, true, true))
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return -ST_XDRV_READ_ERROR;
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uint16_t* p = (uint16_t*)buffer + (s * (idedrv->sector_size / 2));
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insw(idedrv->io + IDE_REG_DATA, p, idedrv->sector_size / 2);
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}
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}
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return ST_OK;
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}
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DEFINE_DEVICE_OP(idedrv_read) {
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if (a1 == NULL || a2 == NULL || a3 == NULL)
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return -ST_BAD_ADDRESS_SPACE;
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size_t sector = *(size_t*)a1;
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size_t sector_count = *(size_t*)a2;
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uint16_t* buffer = a3;
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struct idedrv* idedrv = device->udata;
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if (sector + sector_count > idedrv->sector_count)
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return -ST_OOB_ERROR;
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if (idedrv->bm_support && ((sector_count * idedrv->sector_size) >= 16 * PAGE_SIZE))
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return -ST_OOB_ERROR;
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if (idedrv->current_req != NULL)
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return -ST_TRY_AGAIN;
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if (!ide_wait(idedrv->io, 100000, false, false))
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return -ST_XDRV_READ_ERROR;
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if (idedrv->irqs_support)
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return idedrv_do_read_irqs(idedrv, sector, sector_count, buffer);
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else
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return idedrv_do_read_no_irqs(idedrv, sector, sector_count, buffer);
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}
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static int idedrv_do_write_irqs(struct idedrv* idedrv, size_t sector, size_t sector_count,
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void* buffer) {
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struct idedrv_request* req = malloc(sizeof(*req));
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if (req == NULL)
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return -ST_OOM_ERROR;
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memset(req, 0, sizeof(*req));
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req->buffer = buffer;
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req->sector_count = sector_count;
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req->sector_done_count = 0;
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req->type = IDE_WRITE;
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idedrv->current_req = req;
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ide_prepare(idedrv, sector, sector_count, true);
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uint8_t cmd = idedrv->lba48 ? IDE_CMD_WRITE48 : IDE_CMD_WRITE28;
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outb(idedrv->io + IDE_REG_CMD, cmd);
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if (!ide_wait(idedrv->io, 100000, true, true)) {
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idedrv->current_req = NULL;
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free(req);
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return -ST_XDRV_WRITE_ERROR;
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}
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outsw(idedrv->io + IDE_REG_DATA, buffer, idedrv->sector_size / 2);
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req->sector_done_count = 1;
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biglock_unlock();
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while (!atomic_load(&req->done))
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spin_lock_relax();
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biglock_lock();
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free(req);
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return ST_OK;
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}
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static int idedrv_do_write_no_irqs(struct idedrv* idedrv, size_t sector, size_t sector_count,
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void* buffer) {
|
|
if (idedrv->bm_support) {
|
|
memcpy(idedrv->bounce_buffer, buffer, sector_count * idedrv->sector_size);
|
|
|
|
size_t sectors_done = 0;
|
|
|
|
while (sectors_done < sector_count) {
|
|
size_t chunk_sectors = sector_count - sectors_done;
|
|
size_t max_chunk = (16 * PAGE_SIZE) / idedrv->sector_size;
|
|
|
|
if (chunk_sectors > max_chunk)
|
|
chunk_sectors = max_chunk;
|
|
|
|
size_t byte_count = chunk_sectors * idedrv->sector_size;
|
|
|
|
idedrv->prdt[0].phys_addr = (uint32_t)idedrv->bounce_buffer_phys;
|
|
idedrv->prdt[0].size = (uint16_t)byte_count;
|
|
idedrv->prdt[0].rsvd_eot = 0x8000;
|
|
|
|
uint8_t status = inb(idedrv->bmbase + IDE_DMA_REG_STATUS);
|
|
outb(idedrv->bmbase + IDE_DMA_REG_STATUS,
|
|
status | IDE_DMA_STATUS_INTR | IDE_DMA_STATUS_ERROR);
|
|
|
|
ide_prepare(idedrv, sector + sectors_done, chunk_sectors, false);
|
|
|
|
uint8_t cmd = idedrv->lba48 ? IDE_CMD_WRITE_DMA48 : IDE_CMD_WRITE_DMA28;
|
|
outb(idedrv->io + IDE_REG_CMD, cmd);
|
|
|
|
outb(idedrv->bmbase + IDE_DMA_REG_CMD, 0x01);
|
|
|
|
for (;;) {
|
|
uint8_t bm_status = inb(idedrv->bmbase + IDE_DMA_REG_STATUS);
|
|
|
|
if (!(bm_status & IDE_DMA_STATUS_ACTIVE))
|
|
break;
|
|
|
|
if ((bm_status & IDE_DMA_STATUS_ERROR)) {
|
|
outb(idedrv->bmbase + IDE_DMA_REG_CMD, 0x00);
|
|
return -ST_XDRV_WRITE_ERROR;
|
|
}
|
|
|
|
spin_lock_relax();
|
|
}
|
|
|
|
outb(idedrv->bmbase + IDE_DMA_REG_CMD, 0x00);
|
|
|
|
inb(idedrv->io + IDE_REG_STATUS);
|
|
|
|
sectors_done += chunk_sectors;
|
|
}
|
|
} else {
|
|
ide_prepare(idedrv, sector, sector_count, false);
|
|
|
|
uint8_t cmd = idedrv->lba48 ? IDE_CMD_WRITE48 : IDE_CMD_WRITE28;
|
|
outb(idedrv->io + IDE_REG_CMD, cmd);
|
|
|
|
for (uint16_t s = 0; s < sector_count; s++) {
|
|
if (!ide_wait(idedrv->io, 100000, true, true))
|
|
return -ST_XDRV_WRITE_ERROR;
|
|
|
|
outsw(idedrv->io + IDE_REG_DATA, (uint16_t*)buffer + (s * (idedrv->sector_size / 2)),
|
|
idedrv->sector_size / 2);
|
|
}
|
|
}
|
|
|
|
return ST_OK;
|
|
}
|
|
|
|
DEFINE_DEVICE_OP(idedrv_write) {
|
|
int ret;
|
|
|
|
if (a1 == NULL || a2 == NULL || a3 == NULL)
|
|
return -ST_BAD_ADDRESS_SPACE;
|
|
|
|
size_t sector = *(size_t*)a1;
|
|
size_t sector_count = *(size_t*)a2;
|
|
uint16_t* buffer = a3;
|
|
|
|
struct idedrv* idedrv = device->udata;
|
|
|
|
if (sector + sector_count > idedrv->sector_count)
|
|
return -ST_OOB_ERROR;
|
|
|
|
if (idedrv->bm_support && ((sector_count * idedrv->sector_size) >= 16 * PAGE_SIZE))
|
|
return -ST_OOB_ERROR;
|
|
|
|
if (idedrv->current_req != NULL)
|
|
return -ST_TRY_AGAIN;
|
|
|
|
if (!ide_wait(idedrv->io, 100000, false, false))
|
|
return -ST_XDRV_WRITE_ERROR;
|
|
|
|
if (idedrv->irqs_support)
|
|
ret = idedrv_do_write_irqs(idedrv, sector, sector_count, buffer);
|
|
else
|
|
ret = idedrv_do_write_no_irqs(idedrv, sector, sector_count, buffer);
|
|
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
uint8_t ctrl = inb(idedrv->ctrl);
|
|
ctrl |= 0x02;
|
|
outb(idedrv->ctrl, ctrl);
|
|
|
|
if (idedrv->lba48)
|
|
outb(idedrv->io + IDE_REG_CMD, IDE_CMD_FLUSH48);
|
|
else
|
|
outb(idedrv->io + IDE_REG_CMD, IDE_CMD_FLUSH28);
|
|
|
|
uint8_t status;
|
|
do {
|
|
status = inb(idedrv->io + IDE_REG_STATUS);
|
|
} while (status & IDE_BSY);
|
|
|
|
if (status & (IDE_ERR | IDE_DF))
|
|
return -ST_XDRV_WRITE_ERROR;
|
|
|
|
return ST_OK;
|
|
}
|
|
|
|
DEFINE_DEVICE_OP(idedrv_get_device_type) {
|
|
(void)proc, (void)rctx, (void)device, (void)a2, (void)a3, (void)a4;
|
|
|
|
if (a1 == NULL)
|
|
return -ST_BAD_ADDRESS_SPACE;
|
|
|
|
int* device_type = (int*)a1;
|
|
|
|
*device_type = XDRV_TYPE_IDEDRV;
|
|
|
|
return ST_OK;
|
|
}
|
|
|
|
DEFINE_DEVICE_OP(idedrv_get_sector_size) {
|
|
(void)proc, (void)rctx, (void)a2, (void)a3, (void)a4;
|
|
|
|
if (a1 == NULL)
|
|
return -ST_BAD_ADDRESS_SPACE;
|
|
|
|
size_t* secsize = (size_t*)a1;
|
|
|
|
struct idedrv* idedrv = device->udata;
|
|
|
|
*secsize = idedrv->sector_size;
|
|
|
|
return ST_OK;
|
|
}
|
|
|
|
DEFINE_DEVICE_OP(idedrv_get_size) {
|
|
(void)proc, (void)rctx, (void)a2, (void)a3, (void)a4;
|
|
|
|
if (a1 == NULL)
|
|
return -ST_BAD_ADDRESS_SPACE;
|
|
|
|
size_t* size = (size_t*)a1;
|
|
|
|
struct idedrv* idedrv = device->udata;
|
|
|
|
*size = idedrv->sector_size * idedrv->sector_count;
|
|
|
|
return ST_OK;
|
|
}
|
|
|
|
DEFINE_DEVICE_OP(idedrv_partition_rescan) {
|
|
struct list_node_link *subdevice_link, *tmp_subdevice_link;
|
|
list_foreach(device->subdevices, subdevice_link, tmp_subdevice_link) {
|
|
struct device* subdevice = list_entry(subdevice_link, struct device, subdevices_link);
|
|
|
|
list_remove(device->subdevices, &subdevice->subdevices_link);
|
|
|
|
device_delete(subdevice->key, proc, rctx);
|
|
}
|
|
|
|
int r = device_probe_partitions(proc, rctx, device);
|
|
|
|
return r;
|
|
}
|