Files
mop3/kernel/platform/i386_pc/sys/pit.c
2025-12-10 01:33:51 +01:00

94 lines
2.9 KiB
C

/*
Copyright 2025 Kamil Kowalczyk
Redistribution and use in source and binary forms, with or
without modification, are permitted provided that the following
conditions are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
“AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <libk/types.h>
#include <libk/compiler.h>
#include <sys/pit.h>
#include <sys/ioport.h>
#include <sys/isr.h>
#include <sync/spinlock.h>
#include <irq/irqhandler.h>
#include <config.h>
#define PIT_COUNTER0 0x40
#define PIT_CMD 0x43
#define PIT_CMD_BINARY 0x00
#define PIT_CMD_BCD 0x01
#define PIT_CMD_MODE0 0x00
#define PIT_CMD_MODE1 0x02
#define PIT_CMD_MODE2 0x04
#define PIT_CMD_MODE3 0x06
#define PIT_CMD_MODE4 0x08
#define PIT_CMD_MODE5 0x0A
#define PIT_CMD_LATCH 0x00
#define PIT_CMD_RW_LOW 0x10
#define PIT_CMD_RW_HI 0x20
#define PIT_CMD_RW_BOTH 0x30
#define PIT_CMD_COUNTER0 0x00
#define PIT_CMD_COUNTER1 0x40
#define PIT_CMD_COUNTER2 0x80
#define PIT_CMD_READBACK 0xC0
#define PIT_FREQ 1193182
static uint32_t ticks = 0;
static struct spinlock ticks_spinlock;
uint32_t ticks_get(void) {
sl_lock(&ticks_spinlock);
uint32_t t = ticks;
sl_unlock(&ticks_spinlock);
return t;
}
static void ticks_increment(void) {
sl_lock(&ticks_spinlock);
ticks++;
sl_unlock(&ticks_spinlock);
}
static void pit_irqhandler(unused void *cpustate) {
ticks_increment();
}
void pit_init(void) {
sl_init(&ticks_spinlock, "ticks");
irqhandler_register(IRQ_PIT, &pit_irqhandler);
irqhandler_enable(IRQ_PIT);
uint32_t hz = 1000;
uint32_t div = PIT_FREQ / hz;
ioport_out8(PIT_CMD, PIT_CMD_BINARY | PIT_CMD_MODE3 | PIT_CMD_RW_BOTH | PIT_CMD_COUNTER0);
ioport_out8(PIT_COUNTER0, div & 0xFF);
ioport_out8(PIT_COUNTER0, div >> 8);
}