144 lines
3.6 KiB
C
144 lines
3.6 KiB
C
#include <device/def_device_op.h>
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#include <device/device.h>
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#include <device/xhci.h>
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#include <libk/list.h>
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#include <libk/std.h>
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#include <libk/string.h>
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#include <mm/malloc.h>
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#include <proc/proc.h>
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#include <proc/reschedule.h>
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#include <proc/suspension_q.h>
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#include <sys/debug.h>
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#include <sys/spin_lock.h>
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/* REF:
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* https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/extensible-host-controler-interface-usb-xhci.pdf
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*/
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/* clang-format off */
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/* capability registers */
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#define XHCI_CAPLENGTH 0x00
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#define XHCI_RSVD 0x01
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#define XHCI_HCIVERSION 0x02
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#define XHCI_HCSPARAMS1 0x04
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#define XHCI_HCSPARAMS2 0x08
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#define XHCI_HCSPARAMS3 0x0C
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#define XHCI_HCCPARAMS1 0x10
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#define XHCI_DBOFF 0x14
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#define XHCI_RTSOFF 0x18
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#define XHCI_HCCPARAMS2 0x1C
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/* operational registers */
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#define XHCI_USBCMD 0x00
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#define XHCI_USBSTS 0x04
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#define XHCI_PAGESIZE 0x08
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#define XHCI_DNCTRL 0x14
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#define XHCI_CRCR 0x18
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#define XHCI_DCBAAP 0x30
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#define XHCI_CONFIG 0x38
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/* port registers */
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#define XHCI_PORTSC 0x00
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#define XHCI_PORTPMSC 0x04
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#define XHCI_PORTLI 0x08
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/* runtime registers */
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#define XHCI_MFINDEX 0x00
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/* + IRQ sets (0x20) */
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#define XHCI_IMAN 0x00
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#define XHCI_IMOD 0x04
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#define XHCI_ERSTSZ 0x08
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#define XHCI_ERSTBA 0x10
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#define XHCI_ERDP 0x18
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/* clang-format on */
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static void xhci_write8 (uintptr_t base, uint32_t reg, uint8_t value) {
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*(volatile uint8_t*)(base + reg) = value;
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}
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static void xhci_write16 (uintptr_t base, uint32_t reg, uint16_t value) {
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*(volatile uint16_t*)(base + reg) = value;
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}
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static void xhci_write32 (uintptr_t base, uint32_t reg, uint32_t value) {
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*(volatile uint32_t*)(base + reg) = value;
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}
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static uint8_t xhci_read8 (uintptr_t base, uint32_t reg) {
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return *(volatile uint8_t*)(base + reg);
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}
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static uint16_t xhci_read16 (uintptr_t base, uint32_t reg) {
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return *(volatile uint16_t*)(base + reg);
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}
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static uint32_t xhci_read32 (uintptr_t base, uint32_t reg) {
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return *(volatile uint32_t*)(base + reg);
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}
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DEFINE_DEVICE_INIT (xhci_init) {
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struct xhci* xhci = malloc (sizeof (*xhci));
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if (xhci == NULL)
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return false;
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struct xhci_init* init = arg;
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memset (xhci, 0, sizeof (*xhci));
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xhci->device = device;
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xhci->xhci_mmio_base = init->xhci_mmio_base;
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device->udata = xhci;
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uint8_t cap_length = xhci_read8 (xhci->xhci_mmio_base, XHCI_CAPLENGTH);
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xhci->xhci_oper_base = xhci->xhci_mmio_base + cap_length;
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uint32_t rtsoff = xhci_read32 (xhci->xhci_mmio_base, XHCI_RTSOFF);
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xhci->xhci_runtime_base = xhci->xhci_mmio_base + rtsoff;
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uint32_t dboff = xhci_read32 (xhci->xhci_mmio_base, XHCI_DBOFF);
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xhci->xhci_doorbell_base = xhci->xhci_mmio_base + dboff;
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DEBUG ("starting init sequence\n");
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/* assert CNR is 0 */
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while (xhci_read32 (xhci->xhci_oper_base, XHCI_USBSTS) & (1 << 11))
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spin_lock_relax ();
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/* STOP */
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uint32_t usbcmd = xhci_read32 (xhci->xhci_oper_base, XHCI_USBCMD);
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xhci_write32 (xhci->xhci_oper_base, XHCI_USBCMD, usbcmd & ~0x01);
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/* wait for HCH bit */
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int timeout = 100000;
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while (!(xhci_read32 (xhci->xhci_oper_base, XHCI_USBSTS) & (1 << 12))) {
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if (--timeout == 0)
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break;
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spin_lock_relax ();
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}
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/* RESET */
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xhci_write32 (xhci->xhci_oper_base, XHCI_USBCMD, (1 << 1));
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while (xhci_read32 (xhci->xhci_oper_base, XHCI_USBCMD) & (1 << 1))
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spin_lock_relax ();
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/* Stall while controller not ready */
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while (xhci_read32 (xhci->xhci_oper_base, XHCI_USBSTS) & (1 << 11))
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spin_lock_relax ();
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DEBUG ("XHCI init done\n");
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return true;
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}
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DEFINE_DEVICE_FINI (xhci_fini) {
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struct xhci* xhci = device->udata;
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free (xhci);
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}
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