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96 lines
2.0 KiB
C
96 lines
2.0 KiB
C
#include <amd64/apic.h>
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#include <amd64/init.h>
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#include <amd64/intr_defs.h>
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#include <amd64/mm.h>
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#include <amd64/msr-index.h>
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#include <amd64/msr.h>
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#include <libk/std.h>
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#include <libk/string.h>
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#include <limine/requests.h>
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#include <mm/liballoc.h>
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#include <sync/spin_lock.h>
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#include <sys/debug.h>
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#include <sys/smp.h>
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#include <sys/syscall.h>
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/// Cpu ID counter
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static atomic_uint cpu_counter = 0;
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/// The CPUs
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static struct cpu cpus[CPUS_MAX];
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static atomic_int cpu_init_count;
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/// Allocate a CPU structure
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struct cpu* cpu_make (void) {
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int id = atomic_fetch_add (&cpu_counter, 1);
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struct cpu* cpu = &cpus[id];
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memset (cpu, 0, sizeof (*cpu));
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cpu->lock = SPIN_LOCK_INIT;
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cpu->id = id;
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cpu->self = cpu;
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amd64_wrmsr (MSR_GS_BASE, (uint64_t)cpu);
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return cpu;
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}
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struct cpu* cpu_get (void) {
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struct cpu* ptr = (struct cpu*)amd64_rdmsr (MSR_GS_BASE);
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return ptr;
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}
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void cpu_request_sched (struct cpu* cpu) {
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struct limine_mp_response* mp = limine_mp_request.response;
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for (size_t i = 0; i < mp->cpu_count; i++) {
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if (cpu->id == i) {
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amd64_lapic_ipi (mp->cpus[i]->lapic_id, CPU_REQUEST_SCHED);
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break;
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}
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}
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}
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/// Bootstrap code for non-BSP CPUs
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static void amd64_smp_bootstrap (struct limine_mp_info* mp_info) {
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amd64_load_kernel_cr3 ();
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struct cpu* cpu = cpu_make ();
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amd64_init (cpu, true); /* gdt + idt */
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syscall_init ();
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amd64_lapic_init (0);
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DEBUG ("CPU %u is online!\n", thiscpu->id);
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__asm__ volatile ("sti");
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atomic_fetch_sub (&cpu_init_count, 1);
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for (;;)
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;
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}
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/// Initialize SMP subsystem for AMD64. Start AP CPUs
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void smp_init (void) {
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amd64_lapic_init (10000);
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struct limine_mp_response* mp = limine_mp_request.response;
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cpu_init_count = mp->cpu_count - 1; /* Don't include BSP */
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for (size_t i = 0; i < mp->cpu_count; i++) {
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if (mp->cpus[i]->lapic_id != thiscpu->id) {
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DEBUG ("Trying CPU %u\n", mp->cpus[i]->lapic_id);
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mp->cpus[i]->goto_address = &amd64_smp_bootstrap;
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}
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}
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while (atomic_load (&cpu_init_count) > 0)
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;
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DEBUG ("All CPUs are online\n");
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}
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