#include #include void amd64_io_outb(uint16_t port, uint8_t v) { __asm__ volatile("outb %1, %0" :: "dN"(port), "a"(v)); } void amd64_io_outw(uint16_t port, uint16_t v) { __asm__ volatile("outw %%ax, %%dx" :: "a"(v), "d"(port)); } void amd64_io_outl(uint16_t port, uint32_t v) { __asm__ volatile("outl %%eax, %%dx" :: "d"(port), "a"(v)); } void amd64_io_outsw(uint16_t port, const void *addr, int cnt) { __asm__ volatile( "cld; rep outsw" : "+S"(addr), "+c"(cnt) : "d"(port) : "memory", "cc" ); } uint8_t amd64_io_inb(uint16_t port) { uint8_t r; __asm__ volatile("inb %1, %0" : "=a"(r) : "dN"(port)); return r; } uint16_t amd64_io_inw(uint16_t port) { uint16_t r; __asm__ volatile("inw %%dx, %%ax" : "=a"(r) : "d"(port)); return r; } uint32_t amd64_io_inl(uint16_t port) { uint32_t r; __asm__ volatile("inl %%dx, %%eax" : "=a"(r) : "d"(port)); return r; } void amd64_io_insw(uint16_t port, void *addr, int cnt) { __asm__ volatile( "cld; rep insw" : "+D"(addr), "+c"(cnt) : "d"(port) : "memory", "cc" ); } void amd64_io_wait(void) { amd64_io_outb(0x80, 0); }