Run first app from ramdisk!
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@@ -1,22 +1,27 @@
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#include <amd64/apic.h>
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#include <amd64/intr_defs.h>
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#include <aux/compiler.h>
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#include <irq/irq.h>
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#include <libk/std.h>
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#include <libk/string.h>
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#include <limine/requests.h>
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#include <mm/pmm.h>
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#include <sync/spin_lock.h>
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#include <sys/debug.h>
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#include <sys/mm.h>
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#include <sys/smp.h>
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#define AMD64_PG_PRESENT (1 << 0)
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#define AMD64_PG_RW (1 << 1)
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#define AMD64_PG_USER (1 << 2)
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#define AMD64_PG_TABLE_ENTRIES_MAX 512
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struct pg_index {
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uint16_t pml4, pml3, pml2, pml1;
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} PACKED;
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struct pd kernel_pd = {.lock = SPIN_LOCK_INIT};
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static struct pd kernel_pd = {.lock = SPIN_LOCK_INIT};
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/* This is needed to sync between map/unmap operations and TLB shootdown. */
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static spin_lock_t mm_lock = SPIN_LOCK_INIT;
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static uintptr_t amd64_current_cr3 (void) {
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uintptr_t cr3;
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@@ -41,7 +46,7 @@ static struct pg_index amd64_mm_page_index (uint64_t vaddr) {
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static uint64_t* amd64_mm_next_table (uint64_t* table, uint64_t entry_idx, bool alloc) {
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uint64_t entry = table[entry_idx];
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uint64_t paddr;
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physaddr_t paddr;
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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@@ -53,11 +58,11 @@ static uint64_t* amd64_mm_next_table (uint64_t* table, uint64_t entry_idx, bool
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paddr = pmm_alloc (1);
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if (paddr == 0)
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if (paddr == PMM_ALLOC_ERR)
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return NULL;
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memset ((void*)((uintptr_t)hhdm->offset + (uintptr_t)paddr), 0, PAGE_SIZE);
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table[entry_idx] = paddr | AMD64_PG_PRESENT | AMD64_PG_RW;
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table[entry_idx] = paddr | AMD64_PG_PRESENT | AMD64_PG_RW | AMD64_PG_USER;
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}
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return (uint64_t*)((uintptr_t)hhdm->offset + (uintptr_t)paddr);
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@@ -79,6 +84,8 @@ static void amd64_reload_cr3 (void) {
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}
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void mm_map_page (struct pd* pd, uintptr_t paddr, uintptr_t vaddr, uint32_t flags) {
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spin_lock (&mm_lock);
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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bool do_reload = false;
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@@ -108,11 +115,13 @@ void mm_map_page (struct pd* pd, uintptr_t paddr, uintptr_t vaddr, uint32_t flag
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do_reload = true;
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done:
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if (do_reload)
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if (do_reload && (flags & MM_PD_RELOAD))
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amd64_reload_cr3 ();
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if (flags & MM_PD_LOCK)
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spin_unlock (&pd->lock);
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spin_unlock (&mm_lock);
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}
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void mm_map_kernel_page (uintptr_t paddr, uintptr_t vaddr, uint32_t flags) {
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@@ -120,6 +129,8 @@ void mm_map_kernel_page (uintptr_t paddr, uintptr_t vaddr, uint32_t flags) {
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}
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void mm_unmap_page (struct pd* pd, uintptr_t vaddr, uint32_t flags) {
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spin_lock (&mm_lock);
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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bool do_reload = false;
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@@ -129,15 +140,15 @@ void mm_unmap_page (struct pd* pd, uintptr_t vaddr, uint32_t flags) {
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uint64_t* pml4 = (uint64_t*)(pd->cr3_paddr + (uintptr_t)hhdm->offset);
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struct pg_index pg_index = amd64_mm_page_index (vaddr);
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uint64_t* pml3 = amd64_mm_next_table (pml4, pg_index.pml4, true);
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uint64_t* pml3 = amd64_mm_next_table (pml4, pg_index.pml4, false);
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if (pml3 == NULL)
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goto done;
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uint64_t* pml2 = amd64_mm_next_table (pml3, pg_index.pml3, true);
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uint64_t* pml2 = amd64_mm_next_table (pml3, pg_index.pml3, false);
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if (pml2 == NULL)
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goto done;
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uint64_t* pml1 = amd64_mm_next_table (pml2, pg_index.pml2, true);
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uint64_t* pml1 = amd64_mm_next_table (pml2, pg_index.pml2, false);
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if (pml1 == NULL)
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goto done;
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@@ -147,11 +158,13 @@ void mm_unmap_page (struct pd* pd, uintptr_t vaddr, uint32_t flags) {
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do_reload = true;
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done:
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if (do_reload)
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if (do_reload && (flags & MM_PD_RELOAD))
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amd64_reload_cr3 ();
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if (flags & MM_PD_LOCK)
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spin_unlock (&pd->lock);
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spin_unlock (&mm_lock);
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}
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void mm_unmap_kernel_page (uintptr_t vaddr, uint32_t flags) {
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@@ -162,4 +175,44 @@ void mm_lock_kernel (void) { spin_lock (&kernel_pd.lock); }
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void mm_unlock_kernel (void) { spin_unlock (&kernel_pd.lock); }
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uintptr_t mm_alloc_user_pd_phys (void) {
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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physaddr_t cr3 = pmm_alloc (1);
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if (cr3 == PMM_ALLOC_ERR)
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return 0;
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uint8_t* vu_cr3 = (uint8_t*)((uintptr_t)hhdm->offset + cr3);
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memset ((void*)vu_cr3, 0, PAGE_SIZE / 2);
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uint8_t* vk_cr3 = (uint8_t*)((uintptr_t)hhdm->offset + (uintptr_t)kernel_pd.cr3_paddr);
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memcpy (&vu_cr3[PAGE_SIZE / 2], &vk_cr3[PAGE_SIZE / 2], PAGE_SIZE / 2);
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return cr3;
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}
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void mm_reload (void) {
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spin_lock (&mm_lock);
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struct limine_mp_response* mp = limine_mp_request.response;
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for (size_t i = 0; i < mp->cpu_count; i++) {
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amd64_lapic_ipi (mp->cpus[i]->lapic_id, TLB_SHOOTDOWN);
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}
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spin_unlock (&mm_lock);
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}
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static void amd64_tlb_shootdown_irq (void* arg, void* regs) {
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(void)arg, (void)regs;
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amd64_reload_cr3 ();
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DEBUG ("cpu %u TLB shootdown\n", thiscpu->id);
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}
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void mm_init2 (void) {
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irq_attach (&amd64_tlb_shootdown_irq, NULL, TLB_SHOOTDOWN, IRQ_INTERRUPT_SAFE);
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}
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void mm_init (void) { kernel_pd.cr3_paddr = amd64_current_cr3 (); }
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