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This commit is contained in:
Kamil Kowalczyk
2026-04-24 01:54:48 +02:00
parent 34f7809a2d
commit c8fb575bdd
208 changed files with 6310 additions and 6339 deletions
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188
kernel/device/pci/pci.c
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@@ -18,7 +18,7 @@ static const struct pci_driver_info pci_driver_infos[] = {
static spin_lock_t pci_lock = SPIN_LOCK_INIT;
uint32_t pci_read32 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint32_t pci_read32(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint64_t fpci;
uint32_t addr = (uint32_t)((uint32_t)bus << 16) |
@@ -27,17 +27,17 @@ uint32_t pci_read32 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
(offset & 0xFC) |
((uint32_t)0x80000000);
spin_lock (&pci_lock, &fpci);
spin_lock(&pci_lock, &fpci);
outl (PCI_CONFIG_ADDR, addr);
uint32_t r = inl (PCI_CONFIG_DATA);
outl(PCI_CONFIG_ADDR, addr);
uint32_t r = inl(PCI_CONFIG_DATA);
spin_unlock (&pci_lock, fpci);
spin_unlock(&pci_lock, fpci);
return r;
}
void pci_write32 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value) {
void pci_write32(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value) {
uint64_t fpci;
uint32_t addr = (uint32_t)((uint32_t)bus << 16) |
@@ -46,15 +46,15 @@ void pci_write32 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint3
(offset & 0xFC) |
((uint32_t)0x80000000);
spin_lock (&pci_lock, &fpci);
spin_lock(&pci_lock, &fpci);
outl (PCI_CONFIG_ADDR, addr);
outl (PCI_CONFIG_DATA, value);
outl(PCI_CONFIG_ADDR, addr);
outl(PCI_CONFIG_DATA, value);
spin_unlock (&pci_lock, fpci);
spin_unlock(&pci_lock, fpci);
}
uint16_t pci_read16 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint16_t pci_read16(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint64_t fpci;
uint32_t addr = (uint32_t)((uint32_t)bus << 16) |
@@ -63,17 +63,17 @@ uint16_t pci_read16 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
(offset & 0xFC) |
((uint32_t)0x80000000);
spin_lock (&pci_lock, &fpci);
spin_lock(&pci_lock, &fpci);
outl (PCI_CONFIG_ADDR, addr);
uint16_t r = inw (PCI_CONFIG_DATA + (offset & 2));
outl(PCI_CONFIG_ADDR, addr);
uint16_t r = inw(PCI_CONFIG_DATA + (offset & 2));
spin_unlock (&pci_lock, fpci);
spin_unlock(&pci_lock, fpci);
return r;
}
void pci_write16 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint16_t value) {
void pci_write16(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint16_t value) {
uint64_t fpci;
uint32_t addr = (uint32_t)((uint32_t)bus << 16) |
@@ -82,15 +82,15 @@ void pci_write16 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint1
(offset & 0xFC) |
((uint32_t)0x80000000);
spin_lock (&pci_lock, &fpci);
spin_lock(&pci_lock, &fpci);
outl (PCI_CONFIG_ADDR, addr);
outw (PCI_CONFIG_DATA + (offset & 2), value);
outl(PCI_CONFIG_ADDR, addr);
outw(PCI_CONFIG_DATA + (offset & 2), value);
spin_unlock (&pci_lock, fpci);
spin_unlock(&pci_lock, fpci);
}
uint8_t pci_read8 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint8_t pci_read8(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint64_t fpci;
uint32_t addr = (uint32_t)((uint32_t)bus << 16) |
@@ -99,17 +99,17 @@ uint8_t pci_read8 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
(offset & 0xFC) |
((uint32_t)0x80000000);
spin_lock (&pci_lock, &fpci);
spin_lock(&pci_lock, &fpci);
outl (PCI_CONFIG_ADDR, addr);
uint8_t r = inb (PCI_CONFIG_DATA + (offset & 3));
outl(PCI_CONFIG_ADDR, addr);
uint8_t r = inb(PCI_CONFIG_DATA + (offset & 3));
spin_unlock (&pci_lock, fpci);
spin_unlock(&pci_lock, fpci);
return r;
}
void pci_write8 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_t value) {
void pci_write8(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_t value) {
uint64_t fpci;
uint32_t addr = (uint32_t)((uint32_t)bus << 16) |
@@ -118,42 +118,42 @@ void pci_write8 (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_
(offset & 0xFC) |
((uint32_t)0x80000000);
spin_lock (&pci_lock, &fpci);
spin_lock(&pci_lock, &fpci);
outl (PCI_CONFIG_ADDR, addr);
outb (PCI_CONFIG_DATA + (offset & 3), value);
outl(PCI_CONFIG_ADDR, addr);
outb(PCI_CONFIG_DATA + (offset & 3), value);
spin_unlock (&pci_lock, fpci);
spin_unlock(&pci_lock, fpci);
}
uint8_t pci_find_cap (uint8_t bus, uint8_t slot, uint8_t func, uint8_t cap_id) {
uint16_t status = pci_read16 (bus, slot, func, PCI_STATUS);
uint8_t pci_find_cap(uint8_t bus, uint8_t slot, uint8_t func, uint8_t cap_id) {
uint16_t status = pci_read16(bus, slot, func, PCI_STATUS);
if (!(status & (1 << 4)))
return 0;
uint8_t cap = pci_read8 (bus, slot, func, PCI_CAPABILITY);
uint8_t cap = pci_read8(bus, slot, func, PCI_CAPABILITY);
while (cap != 0) {
uint8_t id = pci_read8 (bus, slot, func, cap);
uint8_t id = pci_read8(bus, slot, func, cap);
if (id == cap_id)
return cap;
cap = pci_read8 (bus, slot, func, cap + 1);
cap = pci_read8(bus, slot, func, cap + 1);
}
return 0;
}
uint64_t pci_get_bar_size (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint32_t bar = pci_read32 (bus, slot, func, offset);
uint64_t pci_get_bar_size(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint32_t bar = pci_read32(bus, slot, func, offset);
pci_write32 (bus, slot, func, offset, 0xFFFFFFFF);
pci_write32(bus, slot, func, offset, 0xFFFFFFFF);
uint32_t mask = pci_read32 (bus, slot, func, offset);
uint32_t mask = pci_read32(bus, slot, func, offset);
pci_write32 (bus, slot, func, offset, bar);
pci_write32(bus, slot, func, offset, bar);
if (mask == 0)
return 0;
@@ -163,10 +163,10 @@ uint64_t pci_get_bar_size (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offs
full_mask = mask & ~0xF;
if ((bar & PCI_BAR_MEM64)) {
uint32_t bar_hi = pci_read32 (bus, slot, func, offset + 4);
pci_write32 (bus, slot, func, offset + 4, 0xFFFFFFFF);
uint32_t mask_hi = pci_read32 (bus, slot, func, offset + 4);
pci_write32 (bus, slot, func, offset + 4, bar_hi);
uint32_t bar_hi = pci_read32(bus, slot, func, offset + 4);
pci_write32(bus, slot, func, offset + 4, 0xFFFFFFFF);
uint32_t mask_hi = pci_read32(bus, slot, func, offset + 4);
pci_write32(bus, slot, func, offset + 4, bar_hi);
full_mask |= ((uint64_t)mask_hi << 32);
}
@@ -178,17 +178,17 @@ uint64_t pci_get_bar_size (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offs
return (~full_mask) + 1;
}
bool pci_msi_init (uint8_t bus, uint8_t slot, uint8_t func, uint8_t vec, uint32_t lapic_id) {
bool pci_msi_init(uint8_t bus, uint8_t slot, uint8_t func, uint8_t vec, uint32_t lapic_id) {
struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
uint8_t cap = pci_find_cap (bus, slot, func, PCI_CAP_MSI);
uint8_t cap = pci_find_cap(bus, slot, func, PCI_CAP_MSI);
if (cap == 0) {
DEBUG ("Device does not support MSI\n");
DEBUG("Device does not support MSI\n");
return false;
}
uint16_t msg_ctrl = pci_read16 (bus, slot, func, cap + 2);
uint16_t msg_ctrl = pci_read16(bus, slot, func, cap + 2);
uintptr_t lapic_phys = thiscpu->lapic_mmio_base - (uintptr_t)hhdm->offset;
@@ -196,35 +196,35 @@ bool pci_msi_init (uint8_t bus, uint8_t slot, uint8_t func, uint8_t vec, uint32_
uint32_t msi_data = (uint32_t)vec & 0xFF;
pci_write32 (bus, slot, func, cap + 4, msi_addr);
pci_write32(bus, slot, func, cap + 4, msi_addr);
/* 32 or 64 bit */
if (msg_ctrl & (1 << 7)) {
/* 64 */
pci_write32 (bus, slot, func, cap + 12, msi_data);
pci_write32(bus, slot, func, cap + 12, msi_data);
} else {
pci_write32 (bus, slot, func, cap + 8, msi_data);
pci_write32(bus, slot, func, cap + 8, msi_data);
}
pci_write16 (bus, slot, func, cap + 2, msg_ctrl | 0x0001);
pci_write16(bus, slot, func, cap + 2, msg_ctrl | 0x0001);
DEBUG ("MSI enabled (lapic %u)\n", lapic_id);
DEBUG("MSI enabled (lapic %u)\n", lapic_id);
return true;
}
static void pci_check_bus (struct proc* proc, struct reschedule_ctx* rctx, uint8_t bus,
pci_cb_func_t cb);
static void pci_check_bus(struct proc* proc, struct reschedule_ctx* rctx, uint8_t bus,
pci_cb_func_t cb);
static void pci_check_func (struct proc* proc, struct reschedule_ctx* rctx, uint8_t bus,
uint8_t slot, uint8_t func, pci_cb_func_t cb) {
uint32_t reg0 = pci_read32 (bus, slot, func, PCI_VENDOR_ID);
static void pci_check_func(struct proc* proc, struct reschedule_ctx* rctx, uint8_t bus,
uint8_t slot, uint8_t func, pci_cb_func_t cb) {
uint32_t reg0 = pci_read32(bus, slot, func, PCI_VENDOR_ID);
uint16_t vendor = (uint16_t)(reg0 & 0xFFFF);
if (vendor == 0xFFFF)
return;
uint32_t reg8 = pci_read32 (bus, slot, func, PCI_REVISION_ID);
uint32_t reg8 = pci_read32(bus, slot, func, PCI_REVISION_ID);
struct pci_info pci_info = {
.bus = bus,
@@ -236,56 +236,56 @@ static void pci_check_func (struct proc* proc, struct reschedule_ctx* rctx, uint
.subclass = ((uint8_t)(reg8 >> 16)),
};
cb (proc, rctx, pci_info);
cb(proc, rctx, pci_info);
/* PCI 2 PCI bridge */
if (pci_info.class == 0x06 && pci_info.subclass == 0x04) {
uint32_t reg18 = pci_read32 (bus, slot, func, 0x18);
uint32_t reg18 = pci_read32(bus, slot, func, 0x18);
uint8_t secondary = (uint8_t)(reg18 >> 8);
pci_check_bus (proc, rctx, secondary, cb);
pci_check_bus(proc, rctx, secondary, cb);
}
}
static void pci_check_device (struct proc* proc, struct reschedule_ctx* rctx, uint8_t bus,
uint8_t slot, pci_cb_func_t cb) {
uint32_t reg0 = pci_read32 (bus, slot, 0, PCI_VENDOR_ID);
static void pci_check_device(struct proc* proc, struct reschedule_ctx* rctx, uint8_t bus,
uint8_t slot, pci_cb_func_t cb) {
uint32_t reg0 = pci_read32(bus, slot, 0, PCI_VENDOR_ID);
if ((uint16_t)(reg0 & 0xFFFF) == 0xFFFF)
return;
pci_check_func (proc, rctx, bus, slot, 0, cb);
pci_check_func(proc, rctx, bus, slot, 0, cb);
/* multifunc device */
uint32_t reg0xc = pci_read32 (bus, slot, 0, PCI_CACHELINE);
uint32_t reg0xc = pci_read32(bus, slot, 0, PCI_CACHELINE);
if ((reg0xc >> 16) & 0x80) {
for (uint8_t func = 1; func < 8; func++)
pci_check_func (proc, rctx, bus, slot, func, cb);
pci_check_func(proc, rctx, bus, slot, func, cb);
}
}
static void pci_check_bus (struct proc* proc, struct reschedule_ctx* rctx, uint8_t bus,
pci_cb_func_t cb) {
static void pci_check_bus(struct proc* proc, struct reschedule_ctx* rctx, uint8_t bus,
pci_cb_func_t cb) {
for (uint8_t slot = 0; slot < 32; slot++)
pci_check_device (proc, rctx, bus, slot, cb);
pci_check_device(proc, rctx, bus, slot, cb);
}
static void pci_enumerate (struct proc* proc, struct reschedule_ctx* rctx, pci_cb_func_t cb) {
uint32_t reg0xc = pci_read32 (0, 0, 0, PCI_CACHELINE);
static void pci_enumerate(struct proc* proc, struct reschedule_ctx* rctx, pci_cb_func_t cb) {
uint32_t reg0xc = pci_read32(0, 0, 0, PCI_CACHELINE);
bool is_multictrl = (reg0xc >> 16) & 0x80;
if (!is_multictrl)
pci_check_bus (proc, rctx, 0, cb);
pci_check_bus(proc, rctx, 0, cb);
else {
for (uint8_t func = 0; func < 8; func++) {
if ((pci_read32 (0, 0, func, PCI_VENDOR_ID) & 0xFFFF) != 0xFFFF)
pci_check_bus (proc, rctx, func, cb);
if ((pci_read32(0, 0, func, PCI_VENDOR_ID) & 0xFFFF) != 0xFFFF)
pci_check_bus(proc, rctx, func, cb);
}
}
}
static void pci_string_identifiers (uint16_t vendor_id, uint16_t device_id, uint8_t class_id,
uint8_t subclass_id, const char** vname, const char** dname,
const char** cname) {
static void pci_string_identifiers(uint16_t vendor_id, uint16_t device_id, uint8_t class_id,
uint8_t subclass_id, const char** vname, const char** dname,
const char** cname) {
*vname = "Unknown vendor";
*dname = "Unknown device";
*cname = "Unknown class";
@@ -312,35 +312,35 @@ static void pci_string_identifiers (uint16_t vendor_id, uint16_t device_id, uint
}
}
static void pci_discovery_cb (struct proc* proc, struct reschedule_ctx* rctx,
struct pci_info pci_info) {
static void pci_discovery_cb(struct proc* proc, struct reschedule_ctx* rctx,
struct pci_info pci_info) {
const char *vname, *dname, *cname;
pci_string_identifiers (pci_info.vendor, pci_info.device, pci_info.class, pci_info.subclass,
&vname, &dname, &cname);
pci_string_identifiers(pci_info.vendor, pci_info.device, pci_info.class, pci_info.subclass,
&vname, &dname, &cname);
DEBUG ("PCI DEVICE: %04x:%04x %02x:%02x at %03d:%03d:%03d / %s; %s; %s\n", pci_info.vendor,
pci_info.device, pci_info.class, pci_info.subclass, pci_info.bus, pci_info.slot,
pci_info.func, vname, dname, cname);
DEBUG("PCI DEVICE: %04x:%04x %02x:%02x at %03d:%03d:%03d / %s; %s; %s\n", pci_info.vendor,
pci_info.device, pci_info.class, pci_info.subclass, pci_info.bus, pci_info.slot,
pci_info.func, vname, dname, cname);
uint8_t cap = pci_find_cap (pci_info.bus, pci_info.slot, pci_info.func, PCI_CAP_MSI);
uint8_t cap = pci_find_cap(pci_info.bus, pci_info.slot, pci_info.func, PCI_CAP_MSI);
if (cap) {
DEBUG ("Device supports MSI!\n");
DEBUG("Device supports MSI!\n");
}
for (size_t driver = 0; driver < lengthof (pci_driver_infos); driver++) {
for (size_t driver = 0; driver < lengthof(pci_driver_infos); driver++) {
if (pci_driver_infos[driver].class == pci_info.class &&
pci_driver_infos[driver].subclass == pci_info.subclass) {
if (!pci_driver_infos[driver].init (proc, rctx, pci_info)) {
DEBUG ("Init failed. Skipping this device!\n");
if (!pci_driver_infos[driver].init(proc, rctx, pci_info)) {
DEBUG("Init failed. Skipping this device!\n");
}
}
}
}
void pci_init (void) {
void pci_init(void) {
struct reschedule_ctx rctx;
memset (&rctx, 0, sizeof (rctx));
memset(&rctx, 0, sizeof(rctx));
pci_enumerate (thiscpu->kproc, &rctx, &pci_discovery_cb);
pci_enumerate(thiscpu->kproc, &rctx, &pci_discovery_cb);
}