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XHCI hardware fixes, ordering of writes, send noop to test
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This commit is contained in:
Kamil Kowalczyk
2026-03-24 23:59:30 +01:00
parent 0478570b2b
commit c71b1cc97d
3 changed files with 41 additions and 22 deletions
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13
kernel/device/pci_xhci.c
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@@ -21,6 +21,11 @@ static int xhci_counter = 0;
bool pci_xhci_init (struct proc* proc, struct reschedule_ctx* rctx, struct pci_info pci_info) {
struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
if (xhci_counter == 3) {
DEBUG ("Cannot initialize more XHCI controllers\n");
return false;
}
uint8_t progif = pci_read8 (pci_info.bus, pci_info.slot, pci_info.func, PCI_PROG_IF);
/* not an XHCI controller */
@@ -64,13 +69,15 @@ bool pci_xhci_init (struct proc* proc, struct reschedule_ctx* rctx, struct pci_i
bool irqs_support = false;
if (!pci_msi_init (pci_info.bus, pci_info.slot, pci_info.func, INTR_XHCI, thiscpu->lapic_id)) {
uint32_t irq = INTR_XHCI0 + xhci_counter;
if (!pci_msi_init (pci_info.bus, pci_info.slot, pci_info.func, irq, thiscpu->lapic_id)) {
uint8_t intr_line = pci_read8 (pci_info.bus, pci_info.slot, pci_info.func, PCI_INTERRUPT_LINE);
uint8_t intr_pin = pci_read8 (pci_info.bus, pci_info.slot, pci_info.func, PCI_INTERRUPT_PIN);
if (intr_pin != 0) {
irqs_support = true;
ioapic_route_irq (INTR_XHCI, intr_line, 0, thiscpu->lapic_id);
ioapic_route_irq (irq, intr_line, 0, thiscpu->lapic_id);
}
} else {
irqs_support = true;
@@ -84,7 +91,7 @@ bool pci_xhci_init (struct proc* proc, struct reschedule_ctx* rctx, struct pci_i
struct xhci_init init = {
.xhci_mmio_base = xhci_base,
.irqs_support = irqs_support,
.irq = INTR_XHCI,
.irq = irq,
};
device_op_func_t ops[] = {0};