Remove amd64_ platform prefix
This commit is contained in:
@@ -30,15 +30,15 @@ void mm_kernel_lock (void) { spin_lock (&kernel_pd_lock); }
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void mm_kernel_unlock (void) { spin_lock (&kernel_pd_lock); }
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/* Get current value of CR3 register */
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static uintptr_t amd64_current_cr3 (void) {
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static uintptr_t current_cr3 (void) {
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uintptr_t cr3;
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__asm__ volatile ("movq %%cr3, %0" : "=r"(cr3)::"memory");
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return cr3;
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}
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/* Load kernel CR3 as current CR3 */
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void amd64_load_kernel_cr3 (void) {
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uintptr_t cr3 = amd64_current_cr3 ();
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void load_kernel_cr3 (void) {
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uintptr_t cr3 = current_cr3 ();
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if (cr3 != kernel_pd.cr3_paddr) {
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__asm__ volatile ("movq %0, %%cr3" ::"r"(kernel_pd.cr3_paddr) : "memory");
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@@ -48,7 +48,7 @@ void amd64_load_kernel_cr3 (void) {
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struct pd* mm_get_kernel_pd (void) { return &kernel_pd; }
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/* Extract PML info from virtual address */
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static struct pg_index amd64_mm_page_index (uint64_t vaddr) {
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static struct pg_index mm_page_index (uint64_t vaddr) {
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struct pg_index ret;
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ret.pml4 = ((vaddr >> 39) & 0x1FF);
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@@ -60,7 +60,7 @@ static struct pg_index amd64_mm_page_index (uint64_t vaddr) {
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}
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/* Walk paging tables and allocate necessary structures along the way */
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static uint64_t* amd64_mm_next_table (uint64_t* table, uint64_t entry_idx, bool alloc) {
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static uint64_t* mm_next_table (uint64_t* table, uint64_t entry_idx, bool alloc) {
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uint64_t entry = table[entry_idx];
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physaddr_t paddr;
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@@ -87,7 +87,7 @@ static uint64_t* amd64_mm_next_table (uint64_t* table, uint64_t entry_idx, bool
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return (uint64_t*)((uintptr_t)hhdm->offset + (uintptr_t)paddr);
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}
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static bool amd64_mm_is_table_empty (uint64_t* table) {
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static bool mm_is_table_empty (uint64_t* table) {
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for (size_t i = 0; i < 512; i++) {
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if (table[i] & AMD64_PG_PRESENT)
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return false;
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@@ -96,7 +96,7 @@ static bool amd64_mm_is_table_empty (uint64_t* table) {
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}
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/* Convert generic memory management subsystem flags into AMD64-specific flags */
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static uint64_t amd64_mm_resolve_flags (uint32_t generic) {
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static uint64_t mm_resolve_flags (uint32_t generic) {
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uint64_t flags = 0;
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flags |= ((generic & MM_PG_PRESENT) ? AMD64_PG_PRESENT : 0);
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@@ -107,41 +107,41 @@ static uint64_t amd64_mm_resolve_flags (uint32_t generic) {
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}
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/* Reload the current CR3 value ON A LOCAL CPU */
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static void amd64_reload_cr3 (void) {
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static void reload_cr3 (void) {
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uint64_t cr3;
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__asm__ volatile ("movq %%cr3, %0; movq %0, %%cr3" : "=r"(cr3)::"memory");
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}
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/* Map physical address to virtual address with flags. TLB needs to be flushed afterwards. */
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void mm_map_page (struct pd* pd, uintptr_t paddr, uintptr_t vaddr, uint32_t flags) {
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void mm_map_page (struct pd* pd, uintptr_t paddr, uintptr_t vaddr, uint32_t flags1) {
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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uint64_t amd64_flags = amd64_mm_resolve_flags (flags);
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uint64_t flags = mm_resolve_flags (flags1);
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uint64_t* pml4 = (uint64_t*)(pd->cr3_paddr + (uintptr_t)hhdm->offset);
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struct pg_index pg_index = amd64_mm_page_index (vaddr);
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struct pg_index pg_index = mm_page_index (vaddr);
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uint64_t* pml3 = amd64_mm_next_table (pml4, pg_index.pml4, true);
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uint64_t* pml3 = mm_next_table (pml4, pg_index.pml4, true);
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if (pml3 == NULL)
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return;
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uint64_t* pml2 = amd64_mm_next_table (pml3, pg_index.pml3, true);
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uint64_t* pml2 = mm_next_table (pml3, pg_index.pml3, true);
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if (pml2 == NULL)
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return;
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uint64_t* pml1 = amd64_mm_next_table (pml2, pg_index.pml2, true);
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uint64_t* pml1 = mm_next_table (pml2, pg_index.pml2, true);
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if (pml1 == NULL)
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return;
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uint64_t* pte = &pml1[pg_index.pml1];
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*pte = ((paddr & ~0xFFFULL) | (amd64_flags & 0x7ULL));
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*pte = ((paddr & ~0xFFFULL) | (flags & 0x7ULL));
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}
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/* Map a page into kernel page directory */
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void mm_map_kernel_page (uintptr_t paddr, uintptr_t vaddr, uint32_t flags) {
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mm_map_page (&kernel_pd, paddr, vaddr, flags);
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amd64_reload_cr3 ();
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reload_cr3 ();
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}
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/* Unmap a virtual address. TLB needs to be flushed afterwards */
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@@ -149,17 +149,17 @@ void mm_unmap_page (struct pd* pd, uintptr_t vaddr) {
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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uint64_t* pml4 = (uint64_t*)(pd->cr3_paddr + (uintptr_t)hhdm->offset);
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struct pg_index pg_index = amd64_mm_page_index (vaddr);
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struct pg_index pg_index = mm_page_index (vaddr);
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uint64_t* pml3 = amd64_mm_next_table (pml4, pg_index.pml4, false);
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uint64_t* pml3 = mm_next_table (pml4, pg_index.pml4, false);
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if (pml3 == NULL)
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return;
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uint64_t* pml2 = amd64_mm_next_table (pml3, pg_index.pml3, false);
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uint64_t* pml2 = mm_next_table (pml3, pg_index.pml3, false);
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if (pml2 == NULL)
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return;
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uint64_t* pml1 = amd64_mm_next_table (pml2, pg_index.pml2, false);
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uint64_t* pml1 = mm_next_table (pml2, pg_index.pml2, false);
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if (pml1 == NULL)
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return;
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@@ -168,17 +168,17 @@ void mm_unmap_page (struct pd* pd, uintptr_t vaddr) {
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if ((*pte) & AMD64_PG_PRESENT)
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*pte = 0;
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if (amd64_mm_is_table_empty (pml1)) {
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if (mm_is_table_empty (pml1)) {
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uintptr_t pml1_phys = pml2[pg_index.pml2] & ~0xFFFULL;
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pmm_free (pml1_phys, 1);
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pml2[pg_index.pml2] = 0;
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if (amd64_mm_is_table_empty (pml2)) {
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if (mm_is_table_empty (pml2)) {
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uintptr_t pml2_phys = pml3[pg_index.pml3] & ~0xFFFULL;
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pmm_free (pml2_phys, 1);
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pml3[pg_index.pml3] = 0;
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if (amd64_mm_is_table_empty (pml3)) {
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if (mm_is_table_empty (pml3)) {
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uintptr_t pml3_phys = pml4[pg_index.pml4] & ~0xFFFULL;
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pmm_free (pml3_phys, 1);
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pml4[pg_index.pml4] = 0;
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@@ -190,7 +190,7 @@ void mm_unmap_page (struct pd* pd, uintptr_t vaddr) {
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/* Unmap a page from kernel page directory */
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void mm_unmap_kernel_page (uintptr_t vaddr) {
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mm_unmap_page (&kernel_pd, vaddr);
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amd64_reload_cr3 ();
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reload_cr3 ();
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}
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/* Allocate a userspace-ready page directory */
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@@ -216,17 +216,17 @@ bool mm_validate (struct pd* pd, uintptr_t vaddr) {
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bool ret = false;
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uint64_t* pml4 = (uint64_t*)(pd->cr3_paddr + (uintptr_t)hhdm->offset);
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struct pg_index pg_index = amd64_mm_page_index (vaddr);
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struct pg_index pg_index = mm_page_index (vaddr);
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uint64_t* pml3 = amd64_mm_next_table (pml4, pg_index.pml4, false);
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uint64_t* pml3 = mm_next_table (pml4, pg_index.pml4, false);
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if (pml3 == NULL)
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goto done;
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uint64_t* pml2 = amd64_mm_next_table (pml3, pg_index.pml3, false);
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uint64_t* pml2 = mm_next_table (pml3, pg_index.pml3, false);
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if (pml2 == NULL)
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goto done;
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uint64_t* pml1 = amd64_mm_next_table (pml2, pg_index.pml2, false);
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uint64_t* pml1 = mm_next_table (pml2, pg_index.pml2, false);
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if (pml1 == NULL)
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goto done;
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@@ -292,17 +292,17 @@ uintptr_t mm_v2p (struct pd* pd, uintptr_t vaddr) {
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uintptr_t ret = 0;
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uint64_t* pml4 = (uint64_t*)(pd->cr3_paddr + (uintptr_t)hhdm->offset);
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struct pg_index pg_index = amd64_mm_page_index (vaddr);
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struct pg_index pg_index = mm_page_index (vaddr);
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uint64_t* pml3 = amd64_mm_next_table (pml4, pg_index.pml4, false);
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uint64_t* pml3 = mm_next_table (pml4, pg_index.pml4, false);
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if (pml3 == NULL)
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goto done;
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uint64_t* pml2 = amd64_mm_next_table (pml3, pg_index.pml3, false);
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uint64_t* pml2 = mm_next_table (pml3, pg_index.pml3, false);
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if (pml2 == NULL)
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goto done;
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uint64_t* pml1 = amd64_mm_next_table (pml2, pg_index.pml2, false);
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uint64_t* pml1 = mm_next_table (pml2, pg_index.pml2, false);
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if (pml1 == NULL)
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goto done;
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@@ -318,4 +318,4 @@ done:
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}
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/* Initialize essentials for the AMD64 memory management subsystem */
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void mm_init (void) { kernel_pd.cr3_paddr = amd64_current_cr3 (); }
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void mm_init (void) { kernel_pd.cr3_paddr = current_cr3 (); }
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