Remove Doxygen-style comments, change formatting to wrap comments
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@@ -10,30 +10,27 @@
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#include <uacpi/tables.h>
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#include <uacpi/uacpi.h>
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/**
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* @file
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*
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* @brief HPET (High Precision Event Timer) driver code.
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* See more at https://wiki.osdev.org/HPET
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/*
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* HPET (High Precision Event Timer) driver code. See more at https://wiki.osdev.org/HPET
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*/
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/// HPET Main Counter Value Register
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/* HPET Main Counter Value Register */
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#define HPET_MCVR 0xF0
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/// HPET General Configuration Register
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/* HPET General Configuration Register */
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#define HPET_GCR 0x10
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/// HPET General Capabilities and ID Register
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/* HPET General Capabilities and ID Register */
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#define HPET_GCIDR 0x00
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/// Set whether we sould use 32-bit or 64-bit reads/writes
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/* Set whether we sould use 32-bit or 64-bit reads/writes */
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static bool hpet_32bits = 1;
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/// Physical address for HPET MMIO
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/* Physical address for HPET MMIO */
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static uintptr_t hpet_paddr;
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/// HPET period in femtoseconds
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/* HPET period in femtoseconds */
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static uint64_t hpet_period_fs;
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/// Lock, which protects concurrent access. See \ref amd64/smp.c
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/* Lock, which protects concurrent access. See amd64/smp.c */
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static spin_lock_t hpet_lock = SPIN_LOCK_INIT;
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/// Read a HPET register. Assumes caller holds \ref hpet_lock
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/* Read a HPET register. Assumes caller holds \ref hpet_lock */
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static uint64_t amd64_hpet_read (uint32_t reg) {
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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uintptr_t hpet_vaddr = hpet_paddr + (uintptr_t)hhdm->offset;
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@@ -41,7 +38,7 @@ static uint64_t amd64_hpet_read (uint32_t reg) {
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: *(volatile uint64_t*)(hpet_vaddr + reg));
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}
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/// Write a HPET register. Assumes caller holds \ref hpet_lock
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/* Write a HPET register. Assumes caller holds \ref hpet_lock */
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static void amd64_hpet_write (uint32_t reg, uint64_t value) {
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struct limine_hhdm_response* hhdm = limine_hhdm_request.response;
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uintptr_t hpet_vaddr = hpet_paddr + (uintptr_t)hhdm->offset;
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@@ -51,10 +48,11 @@ static void amd64_hpet_write (uint32_t reg, uint64_t value) {
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*(volatile uint64_t*)(hpet_vaddr + reg) = value;
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}
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/// Read current value of \ref HPET_MCVR register.
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/* Read current value of \ref HPET_MCVR register. */
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static uint64_t amd64_hpet_timestamp (void) { return amd64_hpet_read (HPET_MCVR); }
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/// Sleep for a given amount of microseconds. This time can last longer due to \ref hpet_lock being held.
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/* Sleep for a given amount of microseconds. This time can last longer due to \ref hpet_lock being
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* held. */
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void amd64_hpet_sleep_micro (uint64_t us) {
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spin_lock (&hpet_lock);
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@@ -74,7 +72,7 @@ void amd64_hpet_sleep_micro (uint64_t us) {
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spin_unlock (&hpet_lock);
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}
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/// Initialize HPET
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/* Initialize HPET */
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void amd64_hpet_init (void) {
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struct uacpi_table hpet_table;
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uacpi_status status = uacpi_table_find_by_signature (ACPI_HPET_SIGNATURE, &hpet_table);
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