kamkow1/mop3
1
1
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

clang-format alignment rules

Browse Source
This commit is contained in:
Kamil Kowalczyk
2025-12-21 23:10:21 +01:00
parent c85cbd0c01
commit 741d0fb9b0
10 changed files with 71 additions and 62 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
kernel/amd64/bootmain.c
View File

@@ -14,8 +14,8 @@ void bootmain (void) {
amd64_init ();
pmm_init ();
uacpi_setup_early_table_access (
(void*)uacpi_memory_buffer, sizeof (uacpi_memory_buffer));
uacpi_setup_early_table_access ((void*)uacpi_memory_buffer,
sizeof (uacpi_memory_buffer));
int* a = malloc (sizeof (int));
*a = 6969;

2
kernel/amd64/debug.c
View File

@@ -5,7 +5,7 @@
#include <libk/string.h>
#include <sys/debug.h>
#define PORT_COM1 0x03F8
#define PORT_COM1 0x03F8
#define BUFFER_SIZE 1024
static bool amd64_debug_serial_tx_empty (void) {

16
kernel/amd64/init.c
View File

@@ -10,9 +10,9 @@
#define GDT_KDATA 0x10
#define GDT_UCODE 0x18
#define GDT_UDATA 0x20
#define GDT_TSS 0x28
#define GDT_TSS 0x28
#define TSS 0x80
#define TSS 0x80
#define TSS_PRESENT 0x89
#define KSTACK_SIZE (8 * 1024)
@@ -41,7 +41,7 @@ ALIGNED (16) static volatile uint8_t kernel_stack[KSTACK_SIZE];
ALIGNED (16) static volatile struct gdt_extended gdt;
static void amd64_gdt_set (volatile struct gdt_entry* ent, uint32_t base,
uint32_t limit, uint8_t acc, uint8_t gran) {
uint32_t limit, uint8_t acc, uint8_t gran) {
ent->baselow = (base & 0xFFFF);
ent->basemid = (base >> 16) & 0xFF;
ent->basehigh = (base >> 24) & 0xFF;
@@ -68,8 +68,8 @@ static void amd64_gdt_init (void) {
amd64_gdt_set (&gdt.old[2], 0, 0xFFFFF, 0x92, 0xC0);
amd64_gdt_set (&gdt.old[3], 0, 0xFFFFF, 0xFA, 0xA0);
amd64_gdt_set (&gdt.old[4], 0, 0xFFFFF, 0xF2, 0xC0);
amd64_gdt_set (
&gdt.tsslow, (tssbase & 0xFFFFFFFF), tsslimit, TSS_PRESENT | TSS, 0);
amd64_gdt_set (&gdt.tsslow, (tssbase & 0xFFFFFFFF), tsslimit,
TSS_PRESENT | TSS, 0);
uint32_t tssbasehigh = (tssbase >> 32);
gdt.tsshigh.limitlow = (tssbasehigh & 0xFFFF);
@@ -93,9 +93,9 @@ static void amd64_gdt_init (void) {
"movw %%ax, %%ds\n"
"movw %%ax, %%es\n"
"movw %%ax, %%ss\n"
:
: [kcode] "i"(GDT_KCODE), [kdata] "i"(GDT_KDATA)
: "rax", "memory");
:
: [kcode] "i"(GDT_KCODE), [kdata] "i"(GDT_KDATA)
: "rax", "memory");
__asm__ volatile ("ltr %0" ::"r"((uint16_t)GDT_TSS));
}

35
kernel/amd64/intr.c
View File

@@ -6,25 +6,25 @@
#include <sys/debug.h>
/* 8259 PIC defs. */
#define PIC1 0x20
#define PIC2 0xA0
#define PIC1_CMD PIC1
#define PIC1 0x20
#define PIC2 0xA0
#define PIC1_CMD PIC1
#define PIC1_DATA (PIC1 + 1)
#define PIC2_CMD PIC2
#define PIC2_CMD PIC2
#define PIC2_DATA (PIC2 + 1)
#define PIC_EOI 0x20
#define PIC_EOI 0x20
#define ICW1_ICW4 0x01
#define ICW1_ICW4 0x01
#define ICW1_SINGLE 0x02
#define ICW1_INTVL4 0x04
#define ICW1_LEVEL 0x08
#define ICW1_INIT 0x10
#define ICW1_LEVEL 0x08
#define ICW1_INIT 0x10
#define ICW4_8086 0x01
#define ICW4_AUTO 0x02
#define ICW4_8086 0x01
#define ICW4_AUTO 0x02
#define ICW4_BUFSLAVE 0x08
#define ICW4_BUFMASER 0x0C
#define ICW4_SFNM 0x10
#define ICW4_SFNM 0x10
#define CASCADE_IRQ 2
@@ -77,8 +77,8 @@ static void amd64_init_pic (void) {
#undef IO_OP
}
static void amd64_idt_set (
volatile struct idt_entry* ent, uint64_t handler, uint8_t flags) {
static void amd64_idt_set (volatile struct idt_entry* ent, uint64_t handler,
uint8_t flags) {
ent->intrlow = (handler & 0xFFFF);
ent->kernel_cs = 0x08; // GDT_KCODE (init.c)
ent->ist = 0;
@@ -167,10 +167,11 @@ static void amd64_intr_exception (struct saved_regs* regs) {
"err=%016lx rip=%016lx cs =%016lx\n"
"rfl=%016lx rsp=%016lx ss =%016lx\n"
"cr2=%016lx cr3=%016lx rbx=%016lx\n",
regs->r15, regs->r14, regs->r13, regs->r12, regs->r11, regs->r10,
regs->r9, regs->r8, regs->rbp, regs->rdi, regs->rsi, regs->rdx, regs->rcx,
regs->rax, regs->trap, regs->error, regs->rip, regs->cs, regs->rflags,
regs->rsp, regs->ss, cr2, cr3, regs->rbx);
regs->r15, regs->r14, regs->r13, regs->r12, regs->r11, regs->r10,
regs->r9, regs->r8, regs->rbp, regs->rdi, regs->rsi, regs->rdx,
regs->rcx, regs->rax, regs->trap, regs->error, regs->rip,
regs->cs, regs->rflags, regs->rsp, regs->ss, cr2, cr3,
regs->rbx);
amd64_spin ();
}

12
kernel/amd64/io.c
View File

@@ -15,9 +15,9 @@ void amd64_io_outl (uint16_t port, uint32_t v) {
void amd64_io_outsw (uint16_t port, const void* addr, int cnt) {
__asm__ volatile ("cld; rep outsw"
: "+S"(addr), "+c"(cnt)
: "d"(port)
: "memory", "cc");
: "+S"(addr), "+c"(cnt)
: "d"(port)
: "memory", "cc");
}
uint8_t amd64_io_inb (uint16_t port) {
@@ -40,9 +40,9 @@ uint32_t amd64_io_inl (uint16_t port) {
void amd64_io_insw (uint16_t port, void* addr, int cnt) {
__asm__ volatile ("cld; rep insw"
: "+D"(addr), "+c"(cnt)
: "d"(port)
: "memory", "cc");
: "+D"(addr), "+c"(cnt)
: "d"(port)
: "memory", "cc");
}
void amd64_io_wait (void) { amd64_io_outb (0x80, 0); }