Handle swapgs in interrupts and scheduling

kernel/amd64/intr_stub.S

@@ -48,6 +48,12 @@
   amd64_intr ## n:; \
   x(n); \
   cli; \
+  movq %rsp, %rax; \
+  movq 144(%rax), %rax; \
+  testb $3, %al; \
+  jz 1f; \
+  swapgs; \
+1:; \
   push_regs; \
   cld; \
   movq %rsp, %rdi; \
@@ -58,6 +64,12 @@
   callq amd64_intr_handler; \
   movq (%rsp), %rsp; \
   pop_regs; \
+  movq %rsp, %rax; \
+  movq 144(%rax), %rax; \
+  testb $3, %al; \
+  jz 2f; \
+  swapgs; \
+2:; \
   addq $16, %rsp; \
   iretq;
   

kernel/amd64/msr.h

@@ -3,9 +3,6 @@
 
 #include <libk/std.h>
 
-#define MSR_FS_BASE 0xC0000100
-#define MSR_GS_BASE 0xC0000101
-
 uint64_t amd64_rdmsr (uint32_t msr);
 void amd64_wrmsr (uint32_t msr, uint64_t value);
 

kernel/amd64/sched.S

@@ -20,5 +20,11 @@ amd64_do_sched:
   movq %rsi, %cr3
   movq %rdi, %rsp
   pop_regs
+
+  movq 144(%rsp), %rax
+  testb $3, %al
+  jz 1f
+  swapgs
+1:
   add $16, %rsp
   iretq

kernel/amd64/smp.c

@@ -41,10 +41,10 @@ struct cpu* cpu_get (uint32_t id) {
 }
 
 /// Get ID of current running CPU
-uint32_t cpu_id (void) { return (uint32_t)amd64_rdmsr (MSR_GS_BASE); }
+uint32_t cpu_id (void) { return (uint32_t)amd64_rdmsr (MSR_SHADOW_GS_BASE); }
 
 /// Assign an ID to the current running CPU
-void cpu_assign (uint32_t id) { amd64_wrmsr (MSR_GS_BASE, (uint64_t)id); }
+void cpu_assign (uint32_t id) { amd64_wrmsr (MSR_SHADOW_GS_BASE, (uint64_t)id); }
 
 /// Bootstrap code for non-BSP CPUs
 static void amd64_smp_bootstrap (struct limine_mp_info* mp_info) {

kernel/proc/proc.c

@@ -17,7 +17,9 @@
 #include <sys/smp.h>
 
 #if defined(__x86_64__)
-#include <amd64/intr_defs.h>
+  #include <amd64/intr_defs.h>
+  #include <amd64/msr.h>
+  #include <amd64/msr-index.h>
 #endif
 
 struct elf_aux {
@@ -216,9 +218,8 @@ void proc_sched (void) {
 
   next = proc_find_sched ();
 
-  if (next != NULL) {
+  if (next != NULL)
     thiscpu->proc_current = next;
-  }
 
   spin_unlock (&thiscpu->lock);