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Document amd64 platform-specific code

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This commit is contained in:
Kamil Kowalczyk
2025-12-30 16:50:15 +01:00
parent 4f4f5c3d2f
commit 34f1e0ba30
17 changed files with 171 additions and 19 deletions
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14
kernel/amd64/apic.c
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@@ -16,21 +16,21 @@
#define INTERRUPT_SRC_OVERRIDES_MAX 24
/// ID of Local APIC
#define LAPIC_ID 0x20
#define LAPIC_ID 0x20
/// End of interrupt register
#define LAPIC_EOI 0xB0
#define LAPIC_EOI 0xB0
/// Spurious interrupt vector register
#define LAPIC_SIVR 0xF0
#define LAPIC_SIVR 0xF0
/// Interrupt command register
#define LAPIC_ICR 0x300
#define LAPIC_ICR 0x300
/// LVT timer register
#define LAPIC_LVTTR 0x320
#define LAPIC_LVTTR 0x320
/// Timer initial count register
#define LAPIC_TIMICT 0x380
/// Timer current count register
#define LAPIC_TIMCCT 0x390
/// Divide config register
#define LAPIC_DCR 0x3E0
#define LAPIC_DCR 0x3E0
/// Table of IOAPICS
static struct acpi_madt_ioapic apics[IOAPICS_MAX];
@@ -45,7 +45,9 @@ static size_t intr_src_override_entries = 0;
/// Local APIC MMIO base address. It comes from MSR_APIC_BASE
static uintptr_t lapic_mmio_base = 0;
/** @cond DOXYGEN_IGNORE */
extern void amd64_spin (void);
/** @endcond */
/// Read IOAPIC
static uint32_t amd64_ioapic_read (uintptr_t vaddr, uint32_t reg) {