Implement lock IRQ nesting via stack variables/contexts
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@@ -57,19 +57,23 @@ static spin_lock_t lapic_calibration_lock = SPIN_LOCK_INIT;
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/* Read IOAPIC */
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static uint32_t amd64_ioapic_read (struct ioapic* ioapic, uint32_t reg) {
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rw_spin_read_lock (&ioapic->lock);
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spin_lock_ctx_t ctxioar;
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rw_spin_read_lock (&ioapic->lock, &ctxioar);
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*(volatile uint32_t*)ioapic->mmio_base = reg;
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uint32_t ret = *(volatile uint32_t*)(ioapic->mmio_base + 0x10);
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rw_spin_read_unlock (&ioapic->lock);
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rw_spin_read_unlock (&ioapic->lock, &ctxioar);
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return ret;
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}
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/* Write IOAPIC */
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static void amd64_ioapic_write (struct ioapic* ioapic, uint32_t reg, uint32_t value) {
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rw_spin_write_lock (&ioapic->lock);
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spin_lock_ctx_t ctxioaw;
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rw_spin_write_lock (&ioapic->lock, &ctxioaw);
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*(volatile uint32_t*)ioapic->mmio_base = reg;
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*(volatile uint32_t*)(ioapic->mmio_base + 0x10) = value;
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rw_spin_write_unlock (&ioapic->lock);
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rw_spin_write_unlock (&ioapic->lock, &ctxioaw);
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}
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/* Find an IOAPIC corresposting to provided IRQ */
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@@ -201,7 +205,9 @@ void amd64_lapic_eoi (void) { amd64_lapic_write (LAPIC_EOI, 0); }
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* us - Period length in microseconds
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*/
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static uint32_t amd64_lapic_calibrate (uint32_t us) {
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spin_lock (&lapic_calibration_lock);
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spin_lock_ctx_t ctxlacb;
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spin_lock (&lapic_calibration_lock, &ctxlacb);
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amd64_lapic_write (LAPIC_DCR, DIVIDER_VALUE);
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@@ -214,7 +220,7 @@ static uint32_t amd64_lapic_calibrate (uint32_t us) {
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uint32_t ticks = 0xFFFFFFFF - amd64_lapic_read (LAPIC_TIMCCT);
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DEBUG ("timer ticks = %u\n", ticks);
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spin_unlock (&lapic_calibration_lock);
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spin_unlock (&lapic_calibration_lock, &ctxlacb);
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return ticks;
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}
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