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XHCI volatile and memory barriers
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This commit is contained in:
Kamil Kowalczyk
2026-04-01 23:00:51 +02:00
parent 14ed21f772
commit 1a81a46803
4 changed files with 57 additions and 8 deletions
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19
kernel/amd64/memorybarrier.h Normal file
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@@ -0,0 +1,19 @@
#ifndef _KERNEL_AMD64_MEMORYBARRIER_H
#define _KERNEL_AMD64_MEMORYBARRIER_H
#define memory_barrier() \
do { \
__asm__ volatile ("mfence" ::: "memory"); \
} while (0)
#define read_memory_barrier() \
do { \
__asm__ volatile ("lfence" ::: "memory"); \
} while (0)
#define write_memory_barrier() \
do { \
__asm__ volatile ("sfence" ::: "memory"); \
} while (0)
#endif // _KERNEL_AMD64_MEMORYBARRIER_H