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131 Commits

Author SHA1 Message Date
Mintsuki
f547a0eea5 sys/lapic: Preserve LAPIC register state across x2APIC-to-xAPIC transition 2026-03-07 03:28:39 +01:00
Mintsuki
16a803ef37 Revert "sys/pic: Reinitialise PICs in pic_flush() to clear stale IRR/ISR state" 
This reverts commit bfde2899fc.
 2026-02-26 00:53:59 +01:00
Mintsuki
20d5ca7045 sys/lapic: Preserve I/O APIC redirection entries when masking 2026-02-26 00:11:21 +01:00
Mintsuki
5979b35b09 sys/lapic: Preserve LVT entries with SMI/INIT/reserved delivery modes 2026-02-26 00:11:21 +01:00
Mintsuki
7e3d6448b7 sys/pic: Reinitialise PICs in pic_flush() to clear stale IRR/ISR state 2026-02-26 00:11:21 +01:00
Mintsuki
076c8bb154 sys/cpu: Round up stall() tick count for sub-MHz timer frequencies 2026-02-26 00:11:21 +01:00
Mintsuki
d01e32eea5 sys/cpu: Fix rdtsc_usec() intermediate overflow 2026-02-26 00:11:21 +01:00
Mintsuki
a6beb8167f sys/iommu: Remove VT-d polling timeout and fix poll loop order 2026-02-26 00:11:21 +01:00
Mintsuki
b7897f857f sys/cpu: Add memory clobber to rdtsc inline assembly 2026-02-26 00:11:21 +01:00
Mintsuki
9456dcb1d9 sys/smp: Add xAPIC ICR delivery status checks to INIT-SIPI-SIPI sequence 2026-02-26 00:11:21 +01:00
Mintsuki
37eddc6ddb sys/iommu: Fix VT-d disable order to TE, IRE, QIE 2026-02-26 00:11:21 +01:00
Mintsuki
fe4544b612 Revert "sys/exceptions: Remove unnecessary exception number bounds check" 
This reverts commit cdc875073c.
 2026-02-22 18:31:14 +01:00
Mintsuki
e5d96fbb91 sys/cpu: Fix integer truncation in stall() 2026-02-22 18:31:14 +01:00
Mintsuki
f6cbd3b698 protos/limine: Strictly define x86-64 machine state for base revision 5 2026-02-22 18:31:14 +01:00
Mintsuki
8df3c7ae5a sys/smp: Try to disable x2APIC when kernel does not support it 2026-02-22 18:31:13 +01:00
Mintsuki
ea41baaf75 protos/limine: Implement base revision 5 2026-02-22 18:31:13 +01:00
Mintsuki
0a2fec6ac6 sys/iommu: Disable Intel VT-d and AMD-Vi IOMMUs before kernel entry 2026-02-22 18:31:13 +01:00
Mintsuki
f1b89ec1bb sys/cpu: Replace cycle-based delay() with calibrated stall() 2026-02-19 20:37:36 +01:00
Mintsuki
ba662d02ea sys/exceptions: Remove unnecessary exception number bounds check 2026-02-19 20:37:36 +01:00
Mintsuki
e7398d8fb5 sys/smp: Use smp_trampoline_size for AArch64 cache maintenance range 2026-02-10 11:10:03 +01:00
Mintsuki
c300a53005 sys/cpu: Use rdtime.d and CPUCFG for LoongArch64 performance timing 2026-02-10 11:10:03 +01:00
Mintsuki
397057ad7d sys/cpu: Use rdtime and time_base_frequency for RISC-V performance timing 2026-02-10 11:10:03 +01:00
Mintsuki
b43094de96 sys/smp: Reject address_cells == 0 in AArch64 DTB SMP enumeration 2026-02-10 11:10:02 +01:00
Mintsuki
890c1aa18f sys/smp: Free buffer and return NULL on zero APs in AArch64 ACPI path 2026-02-10 11:10:02 +01:00
Mintsuki
00a542f0c6 misc: Fix wrong format specifiers for 64-bit arguments in print calls 2026-02-10 11:10:02 +01:00
Mintsuki
ebde1ee086 sys/smp: Send two SIPIs per Intel SDM recommendation for AP startup 2026-02-10 11:10:02 +01:00
Mintsuki
567a03ecbc mm/vmm: Use firmware-reported MMU type instead of satp probe on RISC-V 2026-02-10 11:10:02 +01:00
Mintsuki
5aeaa2a2be sys/smp: Revert AArch64 trampoline allocation to smp_trampoline_size 2026-02-10 11:10:02 +01:00
Mintsuki
da98c40f18 sys/smp: Fix mismatched adrp/add label in AArch64 SMP trampoline EL2 path 2026-02-10 11:10:02 +01:00
Mintsuki
9ff880b13e sys/cpu: Fix 32-bit multiplication overflow in tsc_freq_arch 2026-02-10 10:58:04 +01:00
Mintsuki
42cd5249b8 sys/smp: Skip AP with unrecognised PSCI method instead of panicking 2026-02-10 10:58:04 +01:00
Mintsuki
6a2d7ddfcf sys/lapic: Validate MADT I/O APIC entry length 2026-02-10 10:58:04 +01:00
Mintsuki
667199b97d sys/cpu: Fix AArch64 cache line size calculation to use 4 << field 2026-02-10 10:58:03 +01:00
Mintsuki
6088015eb3 sys/cpu_riscv: Skip re-init when config unchanged to prevent FDT use-after-free 2026-02-10 10:58:03 +01:00
Mintsuki
f279a4411a sys/smp: Pass top of temp stack allocation instead of base 2026-02-10 10:58:03 +01:00
Mintsuki
970709b2c7 a20: Add timeout for keyboard controller polling loops 2026-01-14 18:40:49 +01:00
Mintsuki
66dacaae9c madt: Add entry length validation to prevent infinite loop 2026-01-14 18:40:49 +01:00
Mintsuki
81624fce25 smp: Add MADT GIC entry size validation on AArch64 2026-01-14 18:40:49 +01:00
Mintsuki
ba2b3194e9 cpu_riscv: Add complete bounds validation for RHCT ISA string and MMU nodes 2026-01-14 18:40:49 +01:00
Mintsuki
aef2a4b9fd smp: Validate MADT entry size before accessing type-specific fields 2026-01-14 18:40:49 +01:00
Mintsuki
69a4e0180d cpu_riscv: Add bounds checks for RHCT table parsing 2026-01-14 18:40:49 +01:00
Mintsuki
3aacef11ce smp: Add bounds checks for FADT length and device tree properties 2026-01-14 18:40:49 +01:00
Mintsuki
76941506a8 smp: Fix MADT bounds check, PSCI NULL check, and AArch64 trampoline size 2026-01-14 18:40:49 +01:00
Mintsuki
67ccf78bd6 sys/smp: Prevent infinite loop on zero-length MADT entry 2026-01-05 05:44:08 +01:00
Mintsuki
1cbc9f7a8d sys/cpu_riscv: Add missing continue after invalid ISA string check 2026-01-05 05:44:08 +01:00
Mintsuki
06d0a77964 sys/exceptions: Add bounds check for exception number 2026-01-04 18:31:09 +01:00
Mintsuki
1e43c13bb2 riscv: Simplify logic of code added in 051bb27ed0 2025-11-30 01:13:02 +01:00
Mintsuki
051bb27ed0 riscv: Prioritise CPU init with ACPI unless DTB manually overridden 2025-11-30 00:56:07 +01:00
Kacper Słomiński
02f1a8f539 sys/cpu: Flush entire I-Cache if it's not PIPT on aarch64 
AArch64 permits the I-Cache be either PIPT or VIPT. In the latter
case, flush by VA might leave aliases at other VAs in the cache. I
don't expect there to be any since we're using an identity mapping at
this point, but this doesn't hurt.
 2025-11-29 17:21:49 +01:00
Mintsuki
7d90dcb97a riscv: Fix use-after-free bug related to DTB initialisation 2025-11-29 15:37:22 +01:00